Higher-level modeling of analog integrated circuits

The inability to perform chip-level simulations of complex analog or mixed analog-digital circuits to adequately verify circuit connectivity and functionality has led to long design times and multiple fabrication cycles, which are quite costly to semiconductor manufacturers. One means of reducing lengthy design times and increasing the probability of successful first-silicon is addressed. A unique higher level modeling approach for analog integrated circuits is developed and illustrated. This step-by-step procedure allows the important characteristics of analog circuits to be modeled while unnecessary details are neglected. The resulting models are comprised of linear and nonlinear ordinary differential equations. The important characteristics to be modeled are identified through circuit analysis routines where possible. Some of these identification algorithms have been developed specifically for this work. However, the complicated nature of analog circuits requires that some phenomena be identified by the modeler. Simulation times for the models compare quite favorably to those of the actual circuit, while high degrees of accuracy are maintained. Furthermore, the modeling method provides many avenues for trading simulation speed for accuracy. Results from relatively simple circuits indicate more than an order of magnitude of savings in CPU time while maintaining worst-case large-signal dynamic errors of less than 10-15%. The errors associated with the small-signal dynamics of the circuits are typically less than 2-3% over the frequency range for which the model is designed to operate. The errors associated with the nonlinear static characteristics are typically negligible. These relationships are stored in data tables to provide an easily adjustable accuracy feature. The speed performance of the models is also enhanced. The issues involved with automating this modeling method in software are presented along with results from the semi-automated modeling software package ARAMAC. The feasibility of automatically generating accurate higher level models of analog circuits in a user-driven environment is demonstrated. A complete assessment of the features and limitations of the models produced using this approach is presented.