| The study of artificial neural networks is an integrated research field that involves the disciplines of applied mathematics, physics, neurobiology, computer science, information, control, parallel processing and VLSI. This dissertation deals with a number of topics from a broad spectrum of neural network research in models, algorithms, applications and VLSI architectures. Specifically, this dissertation is aimed at studying neural network algorithms and architectures for pattern classification tasks. The work presented in this dissertation has a wide range of applications including speech recognition, image recognition, and high level knowledge processing.; Supervised neural networks, such as the back-propagation network, can be used for classification tasks as the result of approximating an input/output mapping. They are the approximation-based classifiers. The original gradient descent back-propagation learning algorithm exhibits slow convergence speed. Fast algorithms such as the conjugate gradient and quasi-Newton algorithms can be adopted. The main emphasis on neural network classifiers in this dissertation is the competition-based classifiers. The well known linear perceptron and its learning algorithm can deal with linearly separable classification problems. We propose two extensions, the generalized perceptron classifier and the multi-cluster classifier. They can perform more complex pattern classification tasks. We also give the corresponding learning algorithms and prove certain convergence properties. Another powerful classification model is the Hidden Markov Model (HMM), a doubly stochastic automaton that has been applied in speech recognition. We propose the Ring Hidden Markov Model (RHMM) and demonstrate its good performance in a shape recognition application.; Due to the rapid advance in VLSI technology, parallel processing, and computer aided design (CAD), application-specific VLSI systems are becoming more and more powerful and feasible. In particular, VLSI array processors offer high speed and efficiency through their massive parallelism and pipelining, regularity, modularity, and local communication. A unified VLSI array architecture can be used for implementing neural networks and Hidden Markov Models. We also propose a pipeline interleaving approach to design VLSI array architectures for real-time image and video signal processing. |
