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Structure analysis and modeling for a merged BIPMOS device

Posted on:1993-12-23Degree:Ph.DType:Dissertation
University:North Dakota State UniversityCandidate:Wu, Fang-manFull Text:PDF
GTID:1478390014497515Subject:Electrical engineering
Abstract/Summary:
BICMOS (Bipolar Complementary Metal Oxide Semiconductor) technology combines bipolar and CMOS (Complementary Metal Oxide Semiconductor) transistors in a single integrated circuit. By retaining the benefits of bipolar and CMOS, BICMOS is able to achieve VLSI (Very Large Scale Integration) circuits with speed-power-density performance previously unattainable with either technology individually.;Physically merged MOS (Metal Oxide Semiconductor)-bipolar devices have advantages over conventional BICMOS in density and deduction of interconnection resistance and capacitance.;In order to simulate a merged MOS-bipolar structure in SPICE (Simulation Program with Integrated Circuit Emphasis), its circuit model has to be available in advance. The objective of this dissertation was to develop a DC SPICE model for the merged BIPMOS (Bipolar P-channel MOS) device. The two dimensional device simulator called 5-PISCES 2B (a trademark of the SILVACO International Company) was used to create and simulate a merged BIPMOS structure that is to be modeled.;In this dissertation, some possible approaches for modeling the merged BIPMOS device, such as local surface fitting, subcircuit modeling, and using analytical model equations, are presented, and followed by two developments: "subcircuit model" development and "analytical model equation" development for the merged BIPMOS device.;In the first development, a subcircuit, in which each component has an available model provided by SPICE, is used to represent the merged BIPMOS device. This research work shows that the subcircuit not only consists of the vertical NPN bipolar transistor and the PMOS transistor before merging, but also contains a parasitic lateral PNPN structure which acts as a voltage/current controlled diode. A complete SPICE subcircuit model for the merged BIPMOS device is developed and verified.;The simple properties of the "emitter current surface" of the merged BIPMOS device make it possible to be modeled by an analytical model equation.;In the second development, a 5th-order bivariate DC model equation for the merged BIPMOS device is derived through a special surface fitting technique which is developed by the author.
Keywords/Search Tags:Merged BIPMOS device, Model, Metal oxide semiconductor, Structure, Bipolar, SPICE
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