Junction Engineering and Device Design for Silicon Heterojunction and Interdigitated Back Contact Silicon Heterojunction Solar Cell

The interdigitated back contact silicon heterojunction (IBC-SHJ) solar cell currently holds the record conversion efficiency for non-concentrated single junction silicon solar cells with an efficiency of 26.7%. The aim of this dissertation is to understand the fundamental loss mechanisms of IBC-SHJ related to the rear surface design and to minimize these losses utilizing advanced numerical simulations, novel test structure characterizations and scalable device fabrication processes. The findings in this dissertation will serve as guidance for the industry-oriented R & D efforts to make IBC-SHJ mass-production cost-effective without compromising the performance. The outcomes of this dissertation are four-fold: First, a lifetime simulation tool based on the extended Shockley-Read-Hall (SRH) recombination formalism has been developed as guidance to investigate c-Si surface passivation. Plasma enhanced chemical vapor deposition (PECVD) conditions of intrinsic hydrogenated amorphous silicon (i.a-Si:H) films were explored for passivating the commercial n-type c-Si (n.c-Si) wafer surfaces and correlation to the properties of films was established through material characterizations. Passivated lifetime > 1ms with implied open circuit voltage (iVOC) > 700 mV has been achieved. The trade-off between front surface absorption loss and rear surface emitter junction valence band offset effect was simultaneously accommodated with an optimized i.a-Si:H layer.;Second, an advanced two-dimensional (2-D) IBC-SHJ simulation model has been developed to investigate the IBC-SHJ device rear surface design of three regions: emitter contact, base contact and the non-metallized gap region between them. Simulations suggested that IBC-SHJ performance is more sensitive to the surface passivation quality in emitter and gap regions than the base region. The trade-offs between VOC and FF were diagnosed by experimentally varying p-type a-Si:H layers (p.a-Si:H) and their application on SHJ test structures. A graded high-low p.a-Si:H emitter structure was established, demonstrating IBC-SHJ solar cell efficiency of 20.2% fabricated by complex three-step photolithography (PL) process.;Thirdly, to minimize the lateral transport loss over the rear surface gap region, four different passivation structures were investigated utilizing potential industrially-scalable process. Interface defect density (D it) and interface charge density (Qpass) for the four structures were extracted utilizing a lifetime simulator. The 2-D IBC-SHJ device simulations indicated that > 21.5% conversion efficiency is achievable on devices fabricated with our current process. However, experimental results of IBC-SHJ fabricated with simplified processes suggested that a gap passivation structure which induces inversion at n.c-Si surface should be avoided.;Fourth, to validate the inversion layer effect on IBC-SHJ device, a novel three-terminal rear SHJ test structure was invented. This structure enabled an external DC bias to be applied onto one of the rear contacts for voltage-modulated laser-beam-induced-current (VM-LBIC) measurements. Additionally, device performance was analyzed before and after intentional localized laser damage to base region, which confirmed the detrimental surface inversion effect if any localized high surface recombination region exists within a diffusion length distance from emitter region.;Based on these results, for a commercially viable IBC-SHJ fabrication on n-type c-Si wafer, the following recommendations can be made: 1) Avoid passivation scheme with negative charge that might form inversion layer at the rear surface; 2) Minimize area of localized defective regions with high surface recombination velocity (SRV) and; 3) Low resolution alignment patterning processes which yield gap widths ≥ 100 microm are acceptable if the gap region of IBC-SHJ has an SRV ≤ 5 cm/s.