| Silicon nanophotonics is an emerging technology that promises to provide low latency communication and high bandwidth density for future microprocessors. However, together with the striking benefits comes overheads that requires unique architectural designs to efficiently leverage this technology. In this work, I start by proposing a hybrid hierarchical topology for the adoption of nanophotonics in on-chip networks. It enables both electrical and optical signaling to be utilized when either is more efficient---electrical signaling for local traffic while optical signaling for global traffic. Compared to conventional electrical signaling, nanophotonics is especially feasible for building high-radix global crossbars. However, the high static power consumption of nanophotonic channels threatens the overall efficiency. Thus, I then focus on improving the efficiency of global nanophotonic crossbars by promoting globally sharing a reduced number of nanophotonic channels in a logical crossbar topology. Optical arbitration has been used in global optical crossbars, however, state-of-art on-chip optical arbitration suffers from inherent fixed priority problem. Expensive hardware and power cost are incurred to resolve this problem, which offsets the benefits of optical arbitration. In addition, existing optical arbitration schemes do not support differentiated services, which is a key aspect of Quality-of-Service (QoS) guarantee in on-chip networks. Thus I propose a novel scheme that reuses existing optical hardware to achieve QoS support with much lower hardware and power cost compared to existing schemes. The last part of this work leverages all the previous proposals and try to provide a large scale, highly scalable architecture that supports thousands of cores optically connected across multiple chiplets. Such a disintegrated organization helps pushing the power wall and bandwidth wall of future many-core processors and promises to provide excellent performance scalability. |
