Sigma -delta modulators for integrated circuit analog -to -digital converters

Sigma-delta modulators are at the core of many of today's commercial analog-to-digital and digital-to-analog converters. They have allowed for the development of 18-bit (and higher) resolution data converters; something not available only a decade ago. These modulators are clocked, nonlinear systems which sample an input at sampling rates much higher than the Nyquist rate and feed back a low resolution approximation of this input. This allows for accurate conversion of the signal without relying on a large number of high precision components. The commercial success of Σ-Δ modulators is surprising in light of the inability of current theory to explain some aspects of the system's behavior. The theoretical difficulties lie in the nonlinear nature of the internal quantizer used in the modulators. Linearization of the quantizer model can accurately predict many aspects of modulator performance but some issues, such as stability, can not be accurately determined from this linear model. Designers typically resort to extensive simulation to test for stability. We have developed a nonlinear framework within which stability analyses of high order Σ-Δ modulators may be performed. We show that second order modulation can be stable for constant inputs and present guidelines for choosing circuit coefficient values in order to guarantee stability. These results also allow the designer to choose coefficients in order to increase the dynamic range of the system. Additionally, we show that a large class of modulators of general order are stable in that their integrator outputs are bounded in magnitude. The bounds found in the analysis are quite large and not very useful for design. Some suggestions for improving these bounds numerically are proposed. Finally, we present a novel modulator architecture which attempts to reduce the oversampling rate without sacrificing resolution. A second goal of this new topology is to allow for an increase in the clock rate at which the system can be run. This goal is achieved in part.