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Fabrication and characterization of a planar high temperature superconducting multichip module utilizing YBa(2)Cu(3)O(7-x) interconnects

Posted on:2001-09-14Degree:Ph.DType:Dissertation
University:University of ArkansasCandidate:Cooksey, John WayneFull Text:PDF
GTID:1462390014958115Subject:Engineering
Abstract/Summary:
In the development of high density, high speed multichip modules (MCMs), high temperature superconductor (HTS) interconnects are considered a viable alternative to normal metal interconnects for their low losses at high frequencies, high packing densities and reduced propagation delays. A superconducting MCM-D test module utilizing YBa2Cu3O7−δ (YBCO) high temperature superconductor (HTS) interconnects has been fabricated and tested to operate at liquid nitrogen temperature (77 K).; The MCM unit consists of two gallium arsenide high speed digital clock distribution die connected by YBCO interconnects to form a pair of ring oscillators on a 2.25 cm2 MCM-D substrate. The multilayer interconnection structure consists of two signal layers of YBCO (∼0.3 μm thick) separated by an YSZ (∼0.5 μm)/SiO2 (4–5 μm)/YSZ (∼0.5 μm) interlevel dielectric structure. The YSZ dielectric films deposited by ion beam assisted deposition (IBAD) serve as barrier layers to prevent interdiffusion between the SiO2 and YBCO from occurring while the top layer also acts as a buffer for the top YBCO film deposition. The module was designed using an interconnected mesh power system (IMPS) topology and, thereby, the signal interconnects and power and ground lines are fabricated in only two layers of YBCO. The signal interconnects have 50 μm linewidths and 75 μm spacings. Connection between the two layers of HTS interconnects through the YSZ/SiO2/YSZ dielectric multilayer is accomplished with low contact resistance 40 μm wide gold vias. A combination of wet and dry etching techniques are used to create the via openings and sputter deposited gold is used for connecting the YBCO interconnects through the vias. This technique for making vias provides a low resistivity contact (<10−7 Ω-cm2) between the YBCO layers while maintaining excellent space efficiency. Chemical-mechanical polishing (CMP) has been used to create a planarized silicon dioxide surface for deposition of a high quality top layer of YBCO. Electrical connection between the die and the MCM substrate and between the substrate and the PC board was made using ultrasonic Al or thermosonic Au wire bonds to low contact resistance Au/YBCO bond pads on the MCM substrate.
Keywords/Search Tags:Interconnects, High temperature, YBCO, MCM, Module, HTS
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