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Low-temperature silicon thin films for large-area electronics: Device fabrication using soft lithography and laser-crystallization by sequential lateral solidification

Posted on:2002-07-25Degree:Ph.DType:Dissertation
University:University of Illinois at Urbana-ChampaignCandidate:Jin, Hyun-ChulFull Text:PDF
GTID:1461390011996731Subject:Engineering
Abstract/Summary:
This work demonstrates possible routes for fabricating large-area electronic devices on glass or plastic substrates using low-temperature materials deposition and soft lithographic device patterning. Hydrogenated amorphous silicon (a-Si:H) and polycrystalline silicon (poly-Si) have been extensively studied as the semiconducting material for flat panel displays and solar cells. On glass substrates, we have deposited a-Si:H films at a temperature lower than 125°C, and we have used pulsed excimer laser crystallization in the sequential lateral solidification (SLS) regime to fabricate poly-Si films.; We use micromolding in capillaries (MIMIC), a form of soft lithography involving micrometer-scale polymer molding, as a means to fabricate amorphous silicon thin-film transistors (TFTs), and photoconductive sensor arrays on both planar and curved substrates. The use of non-planar substrates has captured considerable attention in the field because it would open up new applications and new designs.; Field-effect transistors made by SLS poly-Si show excellent mobility and on/off current ratio; however, the microstructure of the material had never been well documented. We determined the microtexture using electron backscattering diffraction (EBSD): the first crystallites formed in the a-Si layer are random; along the direction of the solidification, a strong <100> in-plane orientation quickly develops due to competitive growth and occlusion. The misorientation angle between neighboring grains is also analyzed. A large fraction of the boundaries within the material are low-angle and coincidence site lattice (CSL) types. We discuss the implications of the findings on the defect generation mechanism and on the electrical properties of the films.; We have analyzed the electrical properties of SLS poly-Si films on oxidized Si wafer using the pseudo-MOSFET geometry; the majority carrier mobility is extracted from the transconductance. However, the data are non-ideal due to large contact resistance and current spreading. We discuss the future use of these electrical characterization techniques to analyze the properties of individual grain boundaries in thin film Si bicrystals formed by SLS.
Keywords/Search Tags:Using, SLS, Films, Silicon, Soft, Substrates
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