Frequency division multiple access receiver for wireless interconnection on printed circuit boards

The return voltage levels of high voltage motor drive sections and a low voltage digital control section in an engine controller board of a Hybrid Electric Vehicles (HEV) can differ by several hundreds of volts. Presently, the board utilizes numerous photocouplers that can support ~1 Mbps data rate. Use of wireless inter-chip data communication utilizing single chip radio integrating on-chip antennas to isolate return paths is proposed. In particular, for communication from high voltage section to the low voltage section, FDMA is selected to support seven data channels.;An FMDA receiver that can support seven 400-MHz channels form 24.2 to 27.2 GHz is implemented in the UMC 130 nm logic CMOS process. There are two major parts in the FDMA receiver: receiver and local oscillator generation blocks.;A five stage gain distributed LNA, a BPF and three stage distributed RFA have been demonstrated. The LNA has 19-dB gain and 5.7-dB noise figure at 30 GHz consuming 49.5-mW power. The BPF and RFA combination has 5.2-dB gain and 11.4-dB noise figure at 30 GHz.;The IF LO generator has been demonstrated. It utilizes only dividers composed of DFF and buffers, and does not require a mixer or a filter. Dividers are shared and the total numbers of dividers in is only nine. To reduce the even harmonic effect, every LO outputs have 50% duty cycle and their deviation is less that ±5% in single ended measurements and ±1% in differential measurements. Each LO signal has two selectable phases with difference greater than 60°. The phase offsets from the targets are less than 8%.;A full FDMA receiver test structure has been demonstrated for seven channels. The channels were characterized one at a time using a multiplexer that selects the IF LO frequency. The gain of receiver from LNA to Baseband amplifier is 40 dB and noise figure is 8.7 dB at 27 GHz at 242.3-mW power consumption.;Time shared FDMA receiver operation has been demonstrated up to data rate of 10 Mbps. Two channels are time shared using selection signal. It multiplexes two LO signals with different frequencies.