High performance radio-frequency and millimeter-wave front-end integrated circuits design in silicon-based technologies

The wireless communication market has been explosively growing while being fueled by innovative advancements in digital communication/processing technologies along with revolutionary progression in integrated circuit (IC) technologies, manifested both in the speed of the transistors and the complexity of IC systems. The silicon-based process technologies such as complementary metal oxide semiconductor (CMOS) and silicon-germanium (SiGe) are the key driver in the wireless communication IC industry that can enable implementations of fully integrated single-chip transceivers and hence true one-chip systems of mobile terminal devices at low cost. However, developments of high-performance IC blocks and systems overcoming intrinsic vulnerabilities of the silicon-based technologies have been difficult and laborious tasks.;The objective of this research is to explore limitations and challenges of radio frequency (RF) and millimeter-wave (MMW) front-end IC designs using the silicon-based technologies, and to develop effective circuit topologies and design techniques to improve the target performance of the ICs. CMOS power amplifiers (PAs) for high data-rate mobile communications (e.g., WiMAX) and SiGe receiver front-end circuits and systems for 90 to 94 GHz (W-band) long-range wireless accesses are aimed for exploration in this research.;Detailed contents presented in this dissertation are categorized as following: 1. Fundamental limitations of active and passive devices of the silicon-based technologies (silicon CMOS and SiGe) are discussed from the perspective of transceiver IC designs. 2. The design methodology for a multi-mode linear PA fabricated in a 0.18 mum CMOS technology with enhanced low-power efficiency is presented along with thorough analysis on the novel power combining structure. The design technique and procedure to implement a multi-mode (low-power, medium-power, and high-power modes) multi-standard (WLAN and WiMAX) class-AB CMOS PA is discussed. The PA performance at various operation modes is optimized by employing a novel load impedance modulation technique using varactor-based tunable matching networks. These research works will be published in IEEE Journal of Solid-State Circuits (JSSC) in May 2011 [Publication 1]. A part of the research works has been presented in IEEE Radio Frequency Integrated Circuits (RFIC) Symposium in 2010 [Publication 2]. 3. A new type of power combining transformer, which is appropriate for high-power (i.e., greater than 33-dBm output power) PA applications, is introduced. The proposed transformer performs the parallel (current) combining and the series (voltage) combining simultaneously in a single structure, supplementing drawbacks of conventional types of power combining transformers. The class-AB PA with the proposed combining transformer is implemented in a 0.18 mum CMOS technology, achieving a P1dB of 31.5 dBm and a Psat of 34 dB with a peak PAE of 34.9%. Measurement results show the effectiveness of the proposed PA structure for high-data rate wireless communication standards such as WiMAX. The result of this research work is submitted to IEEE Journal of Solid-State Circuits (JSSC) and is under review [Publication 3]. 4. The design methodologies for W-band (90 to 94 GHz) receiver building blocks such as a low-noise amplifier (LNA), a balun (balanced-to-unbalanced), a mixer using a SiGe technology is presented focusing on performance optimization techniques. Detailed design procedures for individual circuits are discussed with supportive simulation and measurement results. An integrated receiver system is also implemented in a 200-GHz-fT SiGe technology, achieving a maximum conversion gain of 36.3 dB and a minimum noise figure of 10 dB at 91 GHz. The designed receiver demonstrated the highest conversion gain among recently reported receivers built in silicon-based technologies operating beyond 90 GHz. These research works have been presented in IEEE Radio Frequency Integrated Circuits (RFIC) Symposium in 2008 [Publication 4], and published in Electronics Letters in 2009 [Publication 5].