| Globally Asynchronous, Locally Synchronous (GALS) systems have been proposed to alleviate several increasingly difficult challenges in the design of high performance microprocessors, such as global clock distribution, device parameter variations and power consumption. In this dissertation, we explore hardware and software based optimizations for a GALS processor microarchitectures, called MCD (Multiple Clock Domain).;First, we explore how the traditional compiler optimization technique, loop fusion, interacts with the fine grained dynamic voltage and frequency scaling within an MCD processor. A methodology that relates different fusion-induced factors to various architectural effects is proposed. We find that the increased program balance from aggressive loop fusion saves additional energy on an MCD processor even in cases in which performance is not improved.;Second, we propose a series of complexity effective optimizations for MCD processors. Specifically, we examine the online control algorithm, the domain partition scheme, the number of frequency levels, and scaling the front-end, to strike a better balance between complexity, performance and power. The proposed optimizations achieve less performance degradation and more energy savings than the original MCD design, yet with greatly reduced implementation complexity.;Finally, we explore dynamic temperature management (DTM) in MCD processors. A new DVS-based DTM algorithm is proposed and shown to achieve efficient runtime temperature control with reasonable performance overhead. We also explore the synergy between this DTM scheme and the online algorithm geared toward energy efficiency, and find that the combined scheme incurs less performance overhead and better energy efficiency in an MCD processor than a fully synchronous processor. |
