| As the device feature size is continuously shrinking and the bandwidth requirements are increasing, traditional shared-bus architecture will no longer be able to meet the requirements of System-on-Chip (SoC) implementations. Specifically, the inherently non-scalable nature of the shared-bus architecture, as well as its power hungry nature will become the true show stoppers in most practical applications.; Network-on-Chip (NoC) communication architectures have emerged as a promising alternative to address the above problems associated with on-chip buses by employing a packet-based micro-network for inter-IP communication. In this dissertation, we present design methodologies and automation tools for designing application-specific NoCs. More precisely, in the following chapters we identify typical design problems for three classes of NoC platforms (hard, firm, soft) based on their flexibility for customization and provide appropriate automation techniques to customize them. (1) We first present a novel energy-aware scheduling algorithm which statically schedules both communication transactions and computation tasks onto heterogeneous hard NoC architectures under real-time constraints. (2) We then present an algorithm which automatically maps the IPs onto firm NoC platforms and constructs a deadlock-free deterministic routing function such that the total communication energy consumption can be minimized. At the same time, the performance of the resulting communication system is guaranteed to satisfy the specified design constraints through bandwidth reservation. (3) For soft NoC platforms, we address the important problem of application-specific buffer size allocation by providing an efficient buffer allocation algorithm which automatically assigns the buffer depth for each input channel, in different routers across the chip to match its traffic pattern, such that the overall communication performance is maximized. (4) In addition, we also investigate the problem of router design for NoC by proposing and prototyping a smart routing technique which combines the advantages of both deterministic and adaptive routing.; Using a regular tile-based NoC as an example platform, our experimental results show that the proposed methodologies can benefit significantly the implementation of application-specific NoCs in terms of performance improvement and energy/resource efficiency. |
