| Dual Zero Crossing Analog-to-Digital Conversion introduces two analog-to-digital converters based on zero crossing sampling. In conventional zero crossing sampling, a bandlimited input signal is compared to a reference signal. The irregularly spaced zero crossing times, or equivalence times are interpolated to calculate an estimate of the input signal. Zero crossing sampling based on a sine or cosine reference signal is commonly referred to as cosine dither. By adding delta sigma feedback to cosine dither irregular sampling, an approximation of regular Shannon sampling results.; The motivation for zero crossing sampling is found in the current, conflicting trends in integrated circuits. With lower voltages, analog dynamic range is dropping, and with increasing speed and gate count, time quantization is becoming viable.; Dual zero crossing sampling adds the zero crossings of the reference signal to conventional zero crossing sampling. The reference sine wave signal's narrow bandwidth allows a narrow band digital phase-locked loop filter to create an accurate estimate of the reference signal. When the input signal equals the reference signal, sampling the PLLs output gives an estimate of the input signal. A modified Cvetkovic, Daubechies and Logan interpolation algorithm converts the cosine dither to discrete time.; The delta quantization sigma dual zero crossing ADC places a dual zero crossing ADC inside a delta sigma modulator. The irregular cosine dither sampling is converted to an approximation of regular Shannon sampling. Cosine dither sampling for a zero input signal results in regular sampling. In a delta sigma modulator, the output of the integration stage is large compared to zero. The discrete difference signal is approximately zero. To achieve regular sampling in a dual zero crossing ADC, a zero amplitude is required. This requires modifying the signal flow in a delta sigma modulator to create a delta, quantization, sigma signal flow. The cost of placing the quantization block after the discrete difference is the loss of delta sigma noise shaping. The benefits are improved linearity, an approximation of regular sampling and a digital integrator replaces the analog integrator. Unlike simple oversampling, the number of amplitude quantization levels in a delta quantization sigma dual zero crossing ADC increases with sampling frequency. The signal-to-noise ratio for a delta quantization sigma dual zero crossing ADC falls in between a delta sigma modulator (delta sigma noise shaping plus oversampling) and simple oversampling. Theoretical models of dual zero crossing ADCs are compared to simulations. |
