Techniques for efficient power management

Rapid advances in the semiconductor industry have led to the proliferation of electronic devices and information technology. Complementary metal oxide semiconductor (CMOS) integrated circuit technology is being aggressively scaled according to Moore's law to meet the ever increasing demand for low power, low area and high performance. Minimizing the power density and high power efficiency are quintessential needs for today's electronics market. This research addresses the problem with the following contributions.;A bidirectional single supply level shifter design to reduce on-chip power supply routing congestion and increase efficiency in on-chip power distribution is proposed. It has a wide voltage shifting range, functional at low supply voltages and requires no special threshold voltage (VT) devices that increase the cost of fabrication. Further, it's flexible to operate at all combinations of supply voltages in the range and thus enables fine grain dynamic voltage scaling (DVS) required in on-chip power management. This dissertation also explores a low power, zero static current, reliable and high performance level shifter circuit to enable use of low voltage core transistors in high voltage designs.;This dissertation explores dierent ecient power supply designs to address power management at the supply generation level. Firstly, a high peak power efficiency discontinuous conduction mode (DCM) buck converter is proposed for portable applications. The proposed design has a very fast adaptive dead-time circuit, inherent pulse skipping mode during light loads to improve the overall eciency of a DCM converter. Secondly, a wide output voltage range digitally controlled single inductor dual output (SIDO) boost converter is proposed. The proposed minimum phase converter has no positive zero in the control to output transfer function of the boost plant and is linearized across operating points using input-output linearization technique, thus has flexibility to transition across dierent output voltages required in DVS environments. Further, the research also extends the analysis to a n-output converter. Lastly, this dissertation proposes use of nano-electromechanical (NEM) relays in integrated power management. NEM relay is an ideal switch and hence is a very promising class of emerging devices. This research explores NEMS and hybrid NEMS-CMOS based power management circuits for high power eciency. An ultra low power NEMS charge pump and a heterogeneous NEMS-CMOS based DCM buck converter are proposed for lower area and enhanced power efficiency.