A CLL resonant asymmetrical-pulse-width-modulated converter with reduced conduction loss

Telecommunication systems typically use a distributed power architecture where point-of-use power supplies (PUPS) convert the 48V nominal distribution voltage down to a lower voltage required by logic circuitry. As computing power increases, the voltage required to power the circuitry reduces. Voltages of 1.5V, 2.5V, and 3.3V are standard, and sub-1V levels are just on the horizon.;This dissertation proposes a solution to the two aforementioned problems through the use of a three-element resonant tank made up of a single capacitor and two inductors. A CLL resonant asymmetrical pulse-width-modulated converter is able to maintain ZVS for all line and load conditions; as well as naturally adjust circulating current as a function of load to minimize conduction loss. The end result of these benefits is a converter that operates at high frequency, and offers efficiency improvements over existing topologies. These claims are supported by analysis and simulation results, and validated by a proof-of-concept prototype.;To physically shrink the size of the PUPS to save valuable printed circuit board (PCB) space, converters must operate as efficiently as possible at high frequency. To achieve this goal, resonant converters are an attractive option due to their ability to maintain zero voltage switching (ZVS) for a wider range of operating conditions compared to soft-switched topologies. The drawbacks with existing resonant solutions for PUPS applications is due to the wide 35-75V input range required for global use of the converter. Such a large range leads to loss of ZVS at light load or high input voltage; or increased conduction loss through the use of an auxiliary circuit employed to maintain ZVS.