Design of high-dimensional oversampling data converters with on-chip learning: Theory, algorithm and hardware realization

Advances in miniaturization have enabled the integration of high density recording and recognition elements within a single device with applications ranging from biomedical engineering to surveillance sensors. One of the challenges of high density sensing is the acquisition of high dimensional analog signals within a given power budget at a specified resolution. The underlying success of high dimensional sensing depends upon the tracking of low dimensional information manifolds embedded in a high dimensional signal space. The objective of this work is to develop theory, algorithm and hardware for an adaptive high-dimensional mixed signal analog to digital interface that can learn to determine the salient information embedded in a high dimensional analog signal space.;This dissertation presents a framework for constructing a high dimensional oversampling SigmaDelta (Sigma-Delta) learning algorithm and hardware that can identify and track the low-dimensional manifolds embedded in a high-dimensional analog signal space. At the core of the proposed approach is a min-max stochastic optimization of a regularized cost function that combines the machine learning principle with SigmaDelta modulation. As a result, the algorithm not only produces a quantized sequence of transformed analog signals but also a quantized representation of transform itself. Thus, this algorithm naturally yields a high dimensional Spatiotemporal SigmaDelta Learner (Abbrev: STL) system. This STL framework is generic and can be extended to higher-order modulators with different signal transformations. In this work, learning is demonstrated to identify the linear compression manifolds which can eliminate redundant analog-to-digital conversion (ADC) paths. This improves the energy efficiency of the proposed architecture compared to a conventional multi-channel data acquisition system. One of the salient features of this architecture is its self-calibration property in the presence of computational artifacts of mismatch, offset and nonlinearity.;The proposed STL system is realized on chip as a proof of concept. The system is mapped to a mixed signal design that consists of an analog matrix vector multiplier designed with dynamic biasing technique for manifold learning and digitized interface for spatiotemporal data conversion and manifold storage. Measured results from the four dimensional STL system fabricated in a 0.5 mum CMOS process demonstrate the real-time adaptation and self-calibration capabilities that are consistent with theoretical and simulation results. This adaptation and self-calibrating capability of STL system make it suitable for implementing practical high-dimensional analog-to-digital converter. The SigmaDelta learning of designed prototype has been successfully applied for source localization and bearing angle estimation using miniaturized microphone arrays. The proposed architecture is generic and can be applied to wide range of applications which include brain machine interfaces (BMI), "smart" hearing aids, high-density MEMS sensors, electro-chemical, bio-molecular sensor arrays and miniaturized RF antenna arrays.