Design of digital-centric polar modulation transmitters for high-data-rate communications

The increasing demand for cost-effective, small-size, software-reconfigurable and power-efficient mobile communication devices that support modern wireless digital communication standards has lead the industry and academia to develop innovative and sophisticated single-chip radio solutions that target the integration of radio-frequency transceiver circuitry with the digital baseband and application processors. Advanced low-supply-voltage (less than 2V) digital-centric CMOS processes serve as excellent means for achieving this goal. However, the transition to the digital-centric regime necessitates the invention of new transceiver architectures that explore the fast switching characteristics of MOS transistors of CMOS processes and digital signal processing techniques in order to minimize the use of pure analog blocks of conventional transmitters that are best implemented in precision analog-centric processes (e.g., BiCMOS).;The presented research work aims to assist the development of software-defined single-chip radio solutions for modern high-data-rate communications by providing innovative design tactics for digital-centric polar modulation transmitters, which have proven to be excellent candidates for highly power-efficient communication devices.;A computationally efficient low-pass equivalent model of a polar modulation transmitter is presented that captures the primary sources of distortion that may lead to an incompliant RF transmission. These are (a) the envelope and phase path transfer functions, (b) the delays in the polar paths and (c) the gain compression (AM-AM) and amplitude-dependent phase-shift (AM-PM) characteristics of the PA.;A novel baseband complex-envelope is proposed for the analysis and characterization of polar modulators. It is composed of single-tone envelope and phase signals and it provides a solid foundation for the accurate analysis of polar modulators using the low-pass equivalent model, previously described. Closed form expressions are derived that clearly identify the aforementioned sources of distortion on the reconstructed discrete-time baseband complex-envelope. Using these expressions, the optimal design requirements of the envelope modulator and/or the phase modulator are investigated that lead to minimally distorted complex-modulated RF carrier.;A multi-rate discrete-time phase-domain model of digital-centric phase modulators is presented that forms the platform for the study and design of innovative multi-rate ADPLL-based phase modulators. The phase detection mechanism and architecture of an ADPLL-based phase modulator with flexible-rate direct phase/frequency modulation is presented that operates on self-generated clock signals derived from its RF DCO output. The analytical expressions of its modulation, phase noise and aliasing transfer characteristics are validated by means of event-triggered VHDL simulations using accurate behavioral models that are suitable for both high-level programming languages with sequential statement execution e.g., MATLAB, and VHDL-based hardware description language environments with a naturally employed event-driven engine.