Seeing the light: Design and characterization of photodetectors with internal gain fabricated in standard CMOS technologies

A photodetector with gain is a device that combines a photoabsorption mechanism to transduce an optical signal into an electrical one, with a physical mechanism to amplify the result internally. Silicon photodetectors that satisfy these conditions capitalize on either the avalanche multiplication resulting from impact ionization in a pn junction photodiode, or on the field effect/bipolar gain of a phototransistor.;In this dissertation, I describe the implementation of both of these categories of photodetectors in standard CMOS. The use of a standard CMOS technology as the context for fabrication of a photodetector with internal gain allows for integration of sensitive imaging arrays with excellent spatial and temporal resolution, since the detectors, bias circuitry, and other timing and processing electronics can be included on a single die.;When an avalanche photodiode(APD) is operated below its breakdown voltage, in linear mode, the output signal represents the product of the input signal and a finite multiplication coefficient that is proportional to the reverse bias. When the photodiode is operated above breakdown, in geiger mode, the sensitivity of the device is such that a single photon can cause a self-sustaining avalanche breakdown in the diode. In fact, any generated carrier, wanted or otherwise, can trigger an infinite amount of current; therefore, an APD must meet stringent dark current and noise requirements to operate in this regime. In my dissertation, I describe the design of a geiger mode avalanche photodiode in a deep submicron CMOS process using the TCAD Taurus-Medici device simulator to model the electrical and optical behavior of the device. The detectors, fabricated in the TSMC 0.18mum CMOS technology, were extensively characterized and found to exhibit a very low dark count rate at room temperature. Another requirement of geiger mode operation is a quenching circuit, which limits the current to prevent damage to the device, and then resets the detector to prepare it for detection of subsequent photons. My design of a CMOS quenching circuit includes a transistor with a high voltage tolerance to allow for safe operation of the avalanche detector in the low-voltage CMOS process.;The fabrication of avalanche photodiodes in Silicon on Insulator (SOI) technologies, and in fact the design of even basic PIN or pn junction photodiodes or CCDs, is complicated by the limited depth of the silicon layer. Silicon on Sapphire(SOS) CMOS is an SOI technology with the added benefit of a substrate that is transparent to UV, visible, and near infrared light. To overcome the challenges of limited photoabsorption in SOI and also take advantage of the unique spectral advantages of the SOS process, I have designed an MOS phototransistor with specially designed channel contacts that achieve unprecedented responsivities at low voltage bias in a commercial SOS process.;Finally, I describe the design of a photoreceptor that uses adaptation to enhance the dynamic range of a simple PIN photodiode. Although in this case the gain does not stem from a physical mechanism inherent to the photodetector, the external elements that achieve the amplification are tucked underneath the photosensitive surface through the use of a three-dimensionally stacked SOI-CMOS fabrication process, essentially forming a single photodetector.