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Towards Performance, System and Security Issues in Secure Processor Architectures

Posted on:2011-01-08Degree:Ph.DType:Dissertation
University:North Carolina State UniversityCandidate:Chhabra, SiddharthaFull Text:PDF
GTID:1448390002460285Subject:Engineering
Abstract/Summary:
With the growth of digital information stored on modern computer systems, and the increased ability of attackers to target this wealth of information, security has taken a front seat in the design of systems today. One of the design goals of security systems is to protect the integrity and privacy of code executing on the system and prevent attackers from injecting and executing arbitrary code. This type of protection becomes particularly important for enforcing Digital Rights Management (DRM) (for example, in gaming systems), preventing reverse engineering and software piracy. Recently, in addition to software attacks, hardware attacks have emerged to the horizon and present a new set of security challenges for security architects. For example, the plaintext data stored in the main memory presents the attackers with a situation where they can easily scan and dump the contents of main memory, thereby, getting hold of potentially sensitive information such as user passwords and cryptographic keys. Despite the increased complexity of hardware attacks, they are very powerful as they can bypass any software security protection employed in the system. Since software security cannot prevent against hardware attacks, researchers have proposed secure processor architectures which employ hardware mechanisms for memory encryption and authentication to protect the privacy and integrity of applications' code and data against these attacks. In this dissertation, we attempt to address the performance, system, and security issues with secure processor architectures making them practical for adoption in real systems as a powerful solution to system security.;First, we propose a secure processor architecture based on (1) Address Independent Seed Encryption (AISE), a counter-mode based memory encryption scheme using a novel seed composition, and (2) Bonsai Merkle Trees (BMT), a novel Merkle Tree-based memory integrity verification technique. AISE, being a counter-mode memory encryption scheme, effectively hides cryptographic latencies by overlapping the cryptographic work with off-chip data fetches. However, at the same time it eliminates critical system-level issues associated with prior mechanisms such as the lack of virtual memory support and inter-process communication based on shared memory. BMT is a Merkle Tree organization that retains the strong security properties of standard Merkle Tree protection, but provides this protection at significantly reduced execution time and memory storage overheads. Our results show that AISE+BMT reduces the overhead of prior memory encryption and integrity verification schemes from 12% to 2% on average for single-threaded benchmarks on uniprocessor systems, and from 15% to 4% for co-scheduled benchmarks on multicore systems, while eliminating critical system-level problems.;Second, we propose SHIELDSTRAP, a security architecture capable of booting a system securely in the face of hardware and software attacks targeting the boot phase. While secure processor architectures protect the steady state execution of applications, many attacks (for e.g., modchips) target a system during booting before any employed security measure can take effect. SHIELDSTRAP bridges the gap between the vulnerable initialization of the system and the secure steady state execution environment provided by the secure processor. We present an analysis of the security of SHIELDSTRAP against several common boot time attacks and show that SHIELDSTRAP requires an on-chip area overhead of only 0.012% and incurs negligible boot time overhead of 0.37 seconds.;Third, we propose SecureME, a hardware-software mechanism that provides defense against hardware attacks and attacks against the Operating system (OS). Previously proposed secure processor architectures provide defense against hardware attacks but inherently assume a trusted OS. However, a complete security solution must protect applications against vulnerabilities in both the hardware and the OS. SecureME protects an application from hardware attacks by using a secure processor substrate, and also from the Operating System (OS) through memory cloaking, permission paging (a novel secure paging mechanism), and system call protection. Based on our performance evaluation using microbenchmarks, single-program workloads, and multiprogrammed workloads, we found that SecureME only adds a small execution time overhead, averaging 5.2% for SPEC2006 applications compared to a fully-unprotected system. Roughly half of the overheads are contributed by the secure processor substrate. SecureME also incurs a negligible additional storage overheads of 0.58% over the secure processor substrate.
Keywords/Search Tags:Secure processor, System, Security, Hardware attacks, Memory, Performance, Issues, SHIELDSTRAP
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