Fluxless bonding of thermal expansion mismatch materials

Fluxless bonding techniques have been successfully developed to bond thermal expansion mismatch materials which are materials with different coefficients of thermal expansion (CTE). In the first study, 2" silicon (Si) wafers are bonded to silicon wafers using tin-rich tin-silver (Sn-Ag) solders. Si wafers are also bonded to molybdenum (Mo) substrates using similar solder design. Nearly void-free joints are achieved without using any flux. The joints consist of 97 at. % Sn with balance being Ag and gold (Au). The solder joints are thus lead-free (Pb-free).;Pure Ag joints between Si chips and copper (Cu) substrates are successfully produced by directing bonding method at 250°C in 100 millitor vacuum. The bonding temperature is much lower than Ag melting point of 961°C. Nothing is used between Ag and Cu. This is the first time Ag-Cu direct bonding is ever achieved at such a low temperature. Au-coated Si chips are directly bonded to Ag. Two configurations, die attachment and flip-chip interconnect, are demonstrated. For die attachment, Si chip, Ag foil, and Cu substrate are bonded together in one step. As to flip-chip interconnect, Si chips having an array of 10x10 electroplated Ag bumps are directly bonded to Cu substrates. During the bonding process, there is absolutely no molten phase involved. The joints are pure Ag without any intermetallic compound (IMC). Any reliability issues associated with IMCs, thus, are eliminated.;In developing bonding processes using silver-indium (Ag-In) system, reaction of In and Ag during the electroplating process is investigated. It is found that the plated In atoms reacts with Ag to form AgIn2 at room temperature. After the sample is stored at room temperature in air for one day, AgIn 2 grows to 5mum in thickness. With longer storage time, AgIn 2 continues to grow until all indium atoms are consumed. Based on the intermetallic reaction discovered, a fluxless bonding process has been developed between Si chips and Cu substrates using electroplated Ag and In layers. After many bonding experiments, I realize that the success of producing a joint relates to microstructure of the Ag layer. Coarsened Ag grains slow down the Ag2In growth rate. Consequently, the molten phase, (L), can stay at molten state with sufficient time to react with the Ag layer on Si chip to produce a joint. It is worth pointing out that Si and Cu have very large CTE mismatch. Bonding large Si chips to Cu substrates have always been a great challenge in electronic industries.;In another project of bonding CTE mismatch materials, large Si chips are bonded to commercial ceramic packaging using Au80Sn20 eutectic solder. During the reflow, Au80Sn20 solder melts and dissolves Au and Ni layers originally on the ceramic packages. The final alloy joint consists of (Au,Ni)Sn and (Au,Ni) 5Sn compounds. Following this success, glass lids are hermetically sealed on ceramic packages using Sn-rich Sn-Au alloy. Helium leakage rate is measured and confirmed to meet the leak-free criterion specified in MIL-STD-883F.;In bonding Ni to GaN-based LED wafers for building vertical LED structure, 60mum thick nickel layer is electroplated to the GaN/InGaN/GaN stack that is originally grown on Si wafers. Si is then removed using lapping and etching processes so that Ni layer becomes the new substrate. The etching rate is very sensitive to Si orientation. Thus, other thinning methods independent of Si orientation should be developed.;The fluxless bonding technology presented in this dissertation offers the electronic industry new and alternative ways to bond materials with large mismatch in CTE without using any flux. Without flux residues, joint quality and reliability improve. The fluxless advantage is particularly valuable in various applications such as biomedical devices, microelectromechanical system (MEMS) devices, microwave devices, photonic devices, and sensor devices where the use of flux is prohibited.