Efficiency Optimization And Hardware Implementation Of Multivariate Public Key Scheme

With the development of modern information technology,the problem of information security is becoming more and more serious.Network security incidents appear continuously,including personal information,sensitive data,commercial data leaked and stolen,and so on.Cryptography is the core technology to solve the problem of information security.At present,nearly all industrial practical public key schemes are based on integer factorization problem and discrete logarithm problem.However,these two kinds of problems can be solved by quantum computers in polynomial time,which poses a serious security threat to public key cryptography schemes currently in use.Therefore,searching for cryptographic algorithms that can resist attacks from quantum computers has become an important aspect of cryptography research.Post quantum cryptography is based on the difficult problem of the traditional specific mathematical domain,and its security is based on the ability to withstand any known form of quantum attacks.The main research directions of post quantum cryptography are Lattice-based Cryptography,Hash-based Cryptography,Code-based Cryptography and Multivariate Public Key Cryptography.This paper mainly focuses on Multivariate Public Key Cryptography.After thirty years of development,many multivariate encryption schemes and signature schemes have been proposed by scholars.The operation process of multivariate schemes is usually polynomial evaluation or computation between matrices,which is extremely fast.However,the key size of multivariate encryption schemes is always too large for practical applications.Cryptography algorithms are ultimately going to be practical,so it's important to design hardware based on multivariate cryptography.This paper focuses on the efficiency optimization of multivariate schemes and designs efficient implementation of the hardware.First of all,a SRP encryption scheme based on Toeplitz matrix is proposed.Special structure is applied to the private key,which makes the coefficient matrix obtained in the process of decryption be a special Toeplitz matrix.This special structure can reduce the size of the private key and improve the speed of decryption.In terms of security,this paper analyzes the impact of the special structure on the original SRP scheme.Through theoretical analysis and experiments,it is proved that the SRP scheme with special structure will not affect the security.The improved SRP encryption scheme has obvious advantages in size of the private key and decryption speed.Secondly,this paper proposes an online/offline multivariate signature scheme for wireless sensor networks.By combining energy harvesting technology with precomputation technique,the run-time latency and overhead of signature are greatly reduced.In this paper,the multivariable online/offline signature schemes are deployed to the energy harvesting wireless sensor network.By using precomputation at the arrival of the energy peak,energy harvesting technology and precomputation method are combined to reduce the run-time latency of signature process in wireless sensor networks and the energy cost of the system,which make it more suitable for resource-limited wireless sensor network environment.Thirdly,based on PMI+ encryption scheme,this paper also designs two different hardware.The first design is a small-area PMI+ encryption/decryption hardware,which is designed based on the microprogram controller.The small-area hardware takes less resources,but requires a longer decryption cycle.The second design is a fast PMI+ encryption/decryption hardware,which is designed based on state machine,by adding some modules,with the area in exchange for faster decryption speed,and the time-area product is much efficient than other public key cryptographic systems.This paper implements full parallel field multiplier,full parallel field squarer,full parallel vector dot product.And the optimization of large power operation is given.Through the above main optimization and other small improvements,this paper effectively implements the PMI+ encryption and decryption hardware on the FPGA.Finally,This paper designs a multivariate cryptographic hardware which is very suitable for resource-limited environments.The area is very small and the overall performance is relatively high.This hardware can be used for encryption and digital signature,and it is implemented on FPGA.First of all,the basic arithmetic unit is efficiently implemented.Then,by adding a ROM to the multivariate cryptographic hardware to reduce read and write operations of RAM and the size of RAM,this paper optimized the length of the microprocessor instruction and the width of the internal registers.At the same time,we reuse internal registers to reduce the number of internal registers.This paper also optimizes the multivariate encryption process,the computation of the coefficient matrix of linear equations and the process of solving the linear equations.Through the above optimization design,the multivariate cryptographic hardware designed in this paper uses few hardware resources,and the signature and encryption speed is fast,and it's very suitable for resource-limited environments.The hardware can also be used to implement a variety of multivariate cryptographic schemes.