Study On Silicon-based High-speed Optical Switch Chips

Optical switch chips and modules for reconfigurable optical signal routing from any input port to any output port,are the most fundamental and critical components in optical switching networks.Optical switch chips,as widely used in the next generation all-optical switching networks,data center optical interconnects,and computer communications systems,have the merits of compact size,low power consumption,and high stability.Nowadays,silicon photonic integrated circuits have become a hot research topic in both academia and industry,due to their small footprint,low power consumption and compatibility with complementary metal-oxide-semiconductor(CMOS)fabrication process.Silicon-on-insulator(SOI)based optical devices such as modulators,filters,and delay lines have been demonstrated.Moreover,device integration level on SOI chips is also increasing.Hence,high-speed silicon-based optical switch chips have important academic value and extensive applications in optoelectronics.It has become a research hot spot in recent years.To solve the issues of small port-count and slow switching speed existing in the previous silicon-based optical switch chips,this dissertation starts from basic switch elements and switch architectures,and focuses on the development of high speed,low insertion loss,low crosstalk,and low power consumption silicon optical switches.Meanwhile,device fabrication,packaging and testing technologies are also taken into consideration.Besides,we present three different kinds of switch elements to realize high speed,large port-count,and low power consumption silicon-based optical switch chipsFirst of all,this dissertation presents the working principle and the design procedure of silicon-based optical switch chips.We introduce the basic concepts of silicon-based optical switch fabrics.And then,the key characteristics of optical switch chips are presented along with the related impact factors,which offer the orientation and criterion of our research.Based on these key factors,we divide optical switch chips into several basic units,and study two passive components and two active components from a microscopic perspective,including 2×2 3-dB couplers,waveguide crossings,p-i-n diodes and silicon resistive microheaters.To realize passive components with low loss,low crosstalk and active components with low power consumption,low loss,we first introduce the working principle of these four basic components,and then present the detailed design and simulation.After optimization,the measured excess loss of the 2×2 multimode interference(MMI)couplers is 0.22 dB,and the insertion loss of the MMI-based waveguide crossing is 0.05 dB.After that,we discuss several switch architectures from a macroscopic perspective,and then quantitatively compare the switching performances of different architectures as silicon switch chips.After that,this dissertation presents silicon-based 2×2 MZIs as switch elements to realize high-speed large-port-count optical switch chips.By theoretical calculation,we analyze two impact factors to the switching performance of a 2×2 MZI switch,which are non-ideal 2×2 MMI couplers and waveguide arms with unbalanced loss.In order to reduce the device insertion loss and improve the switching performance,we propose 2×2 MZI switch elements with both thermo-optic(TO)and electro-optic(EO)phase shifters imbedded in each of the waveguide arm.The TO tuners are for correcting fabrication induced phase errors,while the EO tuners are for high-speed,low power consumption optical switching.On the basis of above-mentioned 2×2 MZI switch elements,we demonstrate a 4×4 silicon optical switch fabric based on a Benes architecture.We measured the switch power consumption,insertion loss and crosstalk of all the 24 switching states.The average power consumption of the switch chip is 48 mW.The average on-chip insertion loss is from 5.8 to 7.7 dB,and the worst crosstalk is-12 dB.Besides,the switch also realizes QPSK optical data transmission with data rate of 50 Gb/s.On the basis of 4×4 optical switch chips,this dissertation further presents and demonstrates a 16×16 silicon high-speed optical switch chip,which consisting of seven stages of 2×2 MZI switch elements and containing 56 elements in total.Compared with the 4×4 switch fabric,we re-optimize most of the components in the chip.In order to test the system performance of our multiple-port integrated optical switch chips,we performed the electrical and optical package of the chip.The system test results reveal that on-chip insertion loss of the chip is from 6.7 dB to 14 dB,and the worst crosstalk over a 30 nm wavelength range is-10 dB.The power consumption to achieve the “all-bar” state is 1.17 W.We also examined the dynamic routing performance of the 16×16 optical switch by using OOK optical signals.The measured 10%-90% rise and fall times are 3.2 and 2.5 ns,respectively.To the best of our knowledge,this 16×16 silicon optical switch chip is the largest port-count switch fabric among all the reported silicon high-speed optical switch chips.As the optical switch chips based on 2×2 MZI switch elements still have the issues of high power consumption and large crosstalk,we propose a novel 2×2 switch element based on double-ring assisted MZI(DR-MZI)to implement silicon-based optical switch fabrics.The 2×2 DR-MZI is composed of a symmetric MZI coupled with two identical microring resonators(MRRs),with one on each arm.The device working principle is first presented and then the transfer matrix method is used to model the 2×2 DR-MZI.By numerical calculation,we analyze how the coupling coefficient between MRRs and waveguide arms of the MZI impacts the refractive index detuning,optical bandwidth,and insertion loss of the 2×2 DR-MZI switch.Based on the theoretical analysis,we design and experimentally demonstrate a silicon-based 2×2 DR-MZI switch element.Silicon resistive microheaters and p-i-n diodes are both embedded in the two MRRs.This design also uses TO effect to align the resonances of the two MRRs due to fabrication errors,and uses free carrier dispersion effect for high-speed optical switching.The measured crosstalk of the switch element is <-20 dB.The power consumption is only 3 mW.High-throughput optical signal transmission experiments verify the signal integrity up to 25 Gb/s OOK optical data rate after passing through the 2×2 DR-MZI.Temporal response experiments also show that the switching speed can be up to GHz.This dissertation also proposes and demonstrates a 4×4 Benes silicon optical switch fabric based on 2×2 DR-MZI switch elements.The measured crosstalk of the switch chip is below-18.4 dB.The 3-dB optical bandwidth is 35 GHz.The maximum power consumption is 23.75 mW.Comparing with other silicon EO 4×4 switch chips,our DR-MZI based 4×4 optical switch shows better switching performances.Subsequently,we propose a 4×4 balanced non-blocking optical switch chip based on generalized Mach-Zehnder interferometers(GMZIs).We use the transfer matrix method to theoretically study the N×N GMZI switch,and calculate the phase settings of any N×N GMZI optical switch by matrix calculation.As a single N×N GMZI optical switch only has N different switching states,we propose a balanced architecture to realize non-blocking optical switching,and experimentally demonstrate a silicon-based 4×4 non-blocking switch fabric.The proposed switch chip is composed of a 4×4 GMZI and four 2×2 MZIs.This structure has advantages of no waveguide crossings.Besides,as the balanced structure,it has path-independent insertion loss.The optical switch is based on thermo-optic effect,and all the phase shifters are integrated with silicon resistive microheaters.We measured all the 24 switching states of the switch chip.The average on-chip insertion loss is 9 dB,with a routing path variation of ±2 dB.The worst crosstalk of the switch is-12 dB.The average power consumption to realize all the switching states is 109 mW.Besides,we also verify the routing functionality of the chip by performing 40 Gb/s QPSK optical signal transmission experiments.In addition,we use a heuristic model based on the transfer matrix method and random error statistics to estimate how the power imbalance of the 2×2 and 4×4 MMI couplers affects the crosstalk of the 4×4 switch.The calculated results show that the simulation result is in good agreement with the experimental one.The crosstalk of the switch chip can be further reduced to-25 dB by optimizing the 2×2 and 4×4 MMI couplers.In the last chapter,the dissertation summarizes the research work.The research and technology foresight for the high-speed silicon-based optical switch matrix chips is pointed out.