Research On Design Of Key Integrated Circuits In Silicon-Based Microwave Receiver Front-end

With the rapid development of silicon based semiconductor technology,monolithic integrated circuit based on silicon process is becoming the main driver of development of Microwave technology due to its low cost, low power,high integration and high yield. Recently, most attentions have been pain on the high performance silicon-based integrated circuit and system design by academic and industry. In this article, the research on the design technique of high performance silicon based integrated circuit for microwave receiver had been performed both from circuit design technique and process innovation.Firstly, for key circuit of wideband microwave receiver——low noise amplifier,the thesis proposed a wideband low noise amplifier (LNA) design technique based on dual-resonance load network. This technique can achieve impedance matching, low and flat noise figure and high and flat gain profile, simultaneously. Eliminating the tade-off between wideband impedance matching and low noise design in conventional design.A 3?12 GHz LNA based on 130 nm CMOS was designed and fabricated. During the 3?12GHz,the LNA can achieves S11<11dB, power gain of 13.5 ? 1.5dB,and noise figure of 4.3±0.3dB.Secondly, for the key circuit of millimeter-wave phased array receiver——low noise amplifier, thes thesis proposed bandpass distributed LNA design based on zero-phase shifting CRLH T-line. The CRLH T-line in LNA can perform in-phase combining so as to achieve high gain. A 74 ?84 GHz LNA based on 65nm CMOS was designed and fabricated. The LNA can achieve power gain of 11.2 dB over 10 GHz bandwidth.The tunable CRLH T-line based active phase shifter was proposed for millimeter-wave phased array receiver design. By tuning the zero-phase shifting, one can achieve the positive, negative phase shifting at specific frequency. A 37?40 GHz phase shifter was design and fabricated by 130nm BiCMOS process. The phase shifter can achieve 90°phase shifting and power gain of 18.5±2dB.Finally,the split-ring resonator (SRR) is applied to achieve high sensitivity super-regeneration receiver. By applying on-chip SRR device, the over size reduction and sensitivity improvement can be achieve simultaneously. Based on 65nm CMOS process,a 135 GHz super-regeneration receiver has been designed and fabricated. From the measurement, the receiver can achieve sensitivity of 76.8 dB with chip area of 0.0085mm2. Compared to conventional design based on LC tank under the same frequency, the designed receiver chip can achieve 4 dB improvement on sensitivity, and the chip area reduced 60%.