Study On Electrical Transport And Interface Properties Of Amorphous Indium-gallium-zinc Oxide Thin Film Transistors

Transparent oxide-based thin film transistors (TFTs) have been attracting much attention recently due to their excellent electrical and optical characteristics for display applications. In particular, amorphous indium-gallium-zinc oxide (a-IGZO) TFTs are intensively investigated as a replacement for silicon-based TFTs in active matrix displays as they could simultaneously offer high channel electron mobility, high optical transparency, low off-state leakage and low processing temperature. Although a-IGZO TFTs have shown good performance, the stability and reliability properties of a-IGZO TFTs under bias stress and light illumination are still not satisfactory. In particular, since working TFTs in liquid crystal or organic light emitting diode displays are almost inevitably exposed to bias and light during operation, it is necessary to improve the stability behaviors of a-IGZO TFTs for practical applications. Meanwhile, because of the disordered amorphous nature, high density localized trapping states exist within the bandgap of a-IGZO, which would strongly affect the stability and transport properties of the device. Thus, to improve the stability of a-IGZO TFTs, the effect of high-density trap states on device performance is worthy of in-depth investigation. In this thesis, we focus on analyzing carrier transport properties and degradation mechanism of a-IGZO TFTs. The main results are highlighted as below:1. The electrical properties of a-IGZO TFTs are measured in the temperature range from 70to300K. It is found that the device shows normal enhancement mode operation with significantly reduced drain current at low temperature. Its turn-on voltage and subthreshold swing decrease as temperature increases. The transport mechanisms of channel electrons are analyzed based on the evolution of field-effect mobility and channel conductance as a function of temperature and gate bias. It is suggested that in low temperature range, the dominant carrier transport mechanism is hopping between localized band-tail states. As temperature increases, multiple trapping and release plays a role in the whole carrier transport process. Meanwhile, in high gate bias range when the Fermi level moves above the mobility edge, band transport starts to dominate.2. The impact of interfacial trap states on the stability of a-IGZO TFTs is studied under positive gate bias stress. It is found that with increasing stress time, the device exhibits a large positive drift of threshold voltage while maintaining a stable sub-threshold swing and a constant field-effect mobility of channel electrons. The threshold voltage drift is explained by charge trapping at the high-density trap states near the channel/dielectric interface, which is confirmed by photo-excited charge-collection spectroscopy measurement.3. The electrical instability behaviors of a positive-gate-bias-stressed a-IGZO TFTs are studied under monochromatic light illumination. It is found that as the wavelength of incident light reduces from750nm to450nm, the threshold voltage of the illuminated TFT shows a continuous negative shift, which is caused by photo-excitation of trapped electrons at the channel/dielectric interface. Meanwhile, an increase of the sub-threshold swing (SS) is observed when the illumination wavelength is below625nm (～2.0eV). The SS degradation is accompanied by a simultaneous increase of the field effect mobility (μFE) of the TFT, which then decreases at even shorter wavelength beyond540nm (～2.3eV). The variation of SS and μFE is explained by a physical model based on generation of singly ionized oxygen vacancies (Vo+) and double ionized oxygen vacancies (Vo2+) within the a-IGZO active layer by high energy photons, which would form trap states near the mid-gap and the conduction band edge respectively.4. Amorphous IGZO TFTs having an ultra-thin nitrogenated a-IGZO (a-IGZO:N) layer sandwiched at the channel/gate dielectric interface are fabricated. It is found that the device shows enhanced bias stress stability with significantly reduced threshold voltage drift under positive gate bias stress. Based on x-ray photoelectron spectroscopy measurement, the concentration of oxygen vacancies within the a-IGZO:N layer is suppressed due to the formation of N-Ga bonds. Meanwhile, low frequency noise analysis indicates that the average trap density near the channel/dielectric interface continuously drops as the nitrogen content within the a-IGZO:N layer increases. The improved interface quality upon nitrogen doping agrees with the enhanced bias stress stability of the a-IGZO TFTs.5. An enhancement-load prototype inverter based on bottom-gate a-IGZO TFTs is fabricated on glass substrate. The inverter comprises a load and a drive transistor with identical channel length but different channel width. The bottom-gate a-IGZO TFT exhibits field effect mobility of-4cm2/V-s, threshold voltage of～5V, and subthreshold swing of～0.6V/dec. Meanwhile, good logic level conversion is observed from the transfer characteristics of the inverter.