Analyzing And Testing Integrated Circuit With Complex Networks

Abstracting a complex system as a network consisting of numerous interactingindividuals or modules is an important approach to understand of a complex system.Within a single decade, complex network science, using graph theory as amathematical tool, has been expanded to many areas including information, control,physics, biology, social science, and so on. As more and more complex systems havebeen modeled as networks, complex network research applied in circuit system, whichis one of the largest artificial design networks, emerges as a new interdisciplinary task.With the sharp rise of the scale and complexity, designing, testing and diagnosis of ICis now facing enormous challenges. Therefore, new theory and technology researchesare quite necessary for it. For this purpose, this thesis committed to exploringcomplex network models and applications in topological characteristics analyzing,physical designing, testing and diagnosing of circuit system. These researches havepositive practical and theoretical value for the design analysis and optimization oflarge scale circuit systems, and the integration of muti-source information system,while richly expanding theory and practice of complex network science. The researchof the thesis is organized in the form of problem modeling, analysis, and practice. Themain contents of this thesis are summarized as follows:From the point view of modeling, both general and special models are introduced.General models always define electronic components as nodes and the wires betweenthem as lines, where special models owns more abstract definitions of nodes such asdata or patterns. Moreover, experiments carried on ISPD benchmark circuits of IBM,which is general molding, demonstrate both the construction of directed weightednetwork and the complex network characters of VLSI, i.e, small world and scale free.Based on degree indicators, a method for integrated circuit partitioning isintroduced. This method firstly sort degree of nodes, and then choose the node withthe largest value and both its neighbor nodes and edges to constitute a sub-graph. Theapproach establishes the critical degree of the circuit unit and the heavy degree ofunit’s information load in the circuit system. It is conducive to the circuit design insystem partition, reliability and vulnerability analysis. At the same time, afloor-planning is introduced based on network path searching. This method firstlysearches the node pair with the largest value of shortest path between nodes, and then arranges this path as fish shaped. The approach clearly estimates the backbone of thecircuit system, which guide the design process, framework, and labor division ofdesign. On the other hand it makes the layout of the space fully utilized.A novel quantitative similarity measurement method based on the cumulativedistribution of characteristic parameters is proposed, which c an be used to solvenetwork testing problems of local restriction and limitation of qualitative orsemi-quantitative simulation. This method calculates the standard statistics ofmaximum vertical deviation corresponding to the cumulative distribution and t hencorrects inconsistencies in the number of data for each cumulative distribution usingthe proportion of variance. On one hand, this part of research provides simulationplatforms sheds light on algorithm design for the identification of similarity betw eenglobe networks. On the other hand, it is also meaningful for determining patentinfringement of circuit hardware designs that now largely determined from the shapeof the hardware.Further, in order to solve the horrific fluctuation problem along with the growingscale, a controllable scale factor has been introduced to compensate the decreasingstandard statistic. The study shows that as the scale of the circuit system increases,the similarity value of overall network decrease nonlinear obviously. Whe n thenumber of components (modules) is reached105, and the value is close to0. The scalefactor makes the measurement curve converge and stable with the increase in circuitscale, especially when the number of components (modules) more than102.Experiments carried on two direct coupled amplifiers and two off-line universalpower supply, compared respectively with different comparison circuit of roughly thesame scale. It demonstrates that, the proposed method performs well both in miningnetwork characteristics and avoiding their differences.Finally, aiming at at the problem to locate parametric faults in analog circuits, anovel network model associated with soft fault voltage response is proposed. Thesimulation carried on a fourth order low-pass filter is worth noting that power-lawdistribution of nodes comes from the overlapping response of soft fault. According tothis discovery, a novel soft fault diagnosis method based on complex network ispresented with three steps. Low sensitivity components are reduced by removingnetwork hubs, while fault features are driven from the probability of subordinateelements. Further, feature sets are enhanced by splitting the updated response intervalhubs. It is revealed that the proposed method exploits informat ion provided by faultnetwork as well as fault ambiguity minimizing, and consequently, promotes diagnosis accuracy of soft fault.