Investigation Of Ionizing Radiation Effect And Radiation-hardening Techniques Of Ferroelectric Field-effect Transistor

Radiation-hardening technique is one of the key technologies for the stability of various types of spacecraft working in space radiation environment. Memory has been the core of spacecraft electronic systems, whose performance has become one of the most important parameters to the spacecraft. In the outer space and the radiation environment like nuclear explosion, the damage of integrated circuits or information change in memory will lead to collapse of the entire system with disastrous consequences. Recently, intensive experimental research works have been carried out to investigate radiation effects on ferroelectric thin films and ferroelectric-based devices. Good application potentials of ferroelectrics in highly reliable and radiation-hardened memories were reported in these works. The remanent polarization was found to be much more robust than the floating gate stored charge, γ-rays, X-rays,α particles, heavy ions, electrons, protons and other radiation sources are unlikely to change the polarization state of ferroelectric thin films. Therefore, ferroelectric thin-film-based memories are very attractive for space applications. Ferroelectric thin films have two stable polarization states, which can be used to control the switching state of ferroelectric gate field-effect transistor(FeFET) to achieve non-volatile storage of binary information. FeFET is one type of ferroelectric random access memory(FeRAM), which is currently regarded as one of the most potential next generation memory with clear advantages such as its simple structure, nondestructive read-out operation, non-volatility, low power dissipation, high endurance, high speed writing, high density, and compatible with the process of integrated circuit(IC).In order to investigate the ionizing radiation effect and radiation-hardening techniques of ferroelectric field-effect transistor, firstly, in this thesis, the advences of the ferroelectric materials and ferroelectric memory are reviewed in the introduction,including the classification and physical characteristics of the ferroelectric thin films,and the development history, current status and radiation effects of the ferroelectric memories. Then, on the basis of introduction, the total dose effect and single event effect of FeFET are mainly investigated by combining the theoretical modeling and experimental analysis. The main contents and conclusions are as follows:1. The low-energy proton irradiation damage in SrBi2Ta2O9(SBT) ferroelectric thin film was investigated by using Monte Carlo method. The simulation results showthat the displacement damage of the SBT thin film caused by low-energy protons(10keV-100 keV) focuses on the range from 100 to 500 nm. It is evident that the electron stopping power of SBT thin film is in the range of 90- 210 eV/nm, the majority of low-energy protons’ energy loss is ionizing energy loss, which implies that the low-energy proton radiation effect on SBT thin film is mainly a total ionizing dose effect. However, the non-ionizing energy loss(NIEL) of low-energy protons in the SBT thin film can not be ignored, when the fluence of low-energy proton reaches to1014 cm-2, the generated oxygen vacancy density will be greater than 1018 cm-3, which will impact the electrical properties of SBT thin films sufficiently. In addition, the generation of vacancy can be affected strongly by the incident angle of low-energy protons. The incident angle dependency of vacancy number in silicon is similar to that in the SBT thin film, but the total vacancies in SBT thin film is much less, so the displacement damage in the SBT thin film is less than the one in the silicon and the radiation resistance of the SBT thin film is much higher.2. A theoretical model was developed to investigate the ionizing radiation effect on electrical characteristics of the ferroelectric thin film. Modeling results show that the internal electric potential and the electric field distribution in ferroelectric thin film can be affected by the incident radiation dose, so the distribution of dielectric constant, polarization and current density in ferroelectric thin film will be changed accordingly, especially when the zero electric field region occurs in ferroelectric thin film, these changes can be very significant, the dielectric constant, polarization and current density of the ferroelectric film will decrease with the increasing radiation dose, which are agreement well with experimental observations qualitatively. In addition, it is found that the density of oxygen vacancies can significantly affect the degree of radiation-induced degradation in ferroelectric thin film, this conclusion can explain the difference of observation results in ferroelectric thin film irradiation experiment. Radiation-induced degradation can be affected strongly by the ferroelectric thin film thickness, from these viewpoints, we can conclude that under the premise of ensuring the performance of the device, selecting a thin, high quality ferroelectric thin film will effectively improve the total dose radiation resistance of ferroelectric thin film devices.3. The gamma irradiation effects in the fabricated Pt/SBT/HfTaO/Si MFIS FeFETs were studied experimentally. P-type channel metal-ferroelectric-insulatorsilicon(MFIS) field-effect transistors(FET) with a 300 nm thick Sr Bi2Ta2O9(SBT)ferroelectric film and a 10 nm thick HfTaO layer on silicon substrate were fabricated and characterized. It is observed that the memory window of the FeFET is 0.7 V and the drain current on/off ratio is as high as 105. The fabricated device exhibits excellent good drain-current on/off ratio of about 104 after a 24 hours data retention test. The prepared FeFETs were then subjected to 60 Co gamma irradiation in steps of three dose levels. Irradiation-induced degradation on electrical characteristics of the fabricated FeFETs were observed. The mechanisms contributing to the irradiation-induced degradation could be explained as a combination effect from the irradiation-buildup oxide trapped charges and interface charges. On one hand, oxide trapped charges and interface charges could contribute additional gate potential which will cause the voltage shift. On the other hand, these charges could lead to local charge compensation in the ferroelectric thin film and gradually diminish the polarization.While depolarization field induced by imperfect screening shows the opposite direction to the ferroelectric spontaneous polarization and causes polarization loss via back-switching behavior, which is the main reason of retention time reduction.4. A theoretical model was proposed to study the ionizing radiation effect on the electrical characteristics of MFIS structure ferroelectric field-effect transistor during the exposure and in the post-radiated condition. In this model, the radiation-induced degradation in ferroelectric layer, oxide layer and silicon-dioxide interface were considered, and the radiation effect of the silicon substrate was also taken into account to accommodate the dose rate effect. The modeling results showed that the ferroelectric polarization, surface potential and high frequency capacitance were affected strongly by the incident ionizing radiation, especially by the high incident total dose and/or dose rate. It was observed that the post-radiated behavior of the MFIS FeFET was mainly determined by the total received dose, while the response to radiation during the exposure was controlled by both the total received dose and the dose rate. Moreover, the phenomena of radiation-induced polarization loss and imprint in the ferroelectric thin film were well reproduced after a polarization loss factor was introduced in this model. The calculation results indicated that the stability and reliability of MFIS structure devices for nonvolatile memory applications are both beyond of the control upon the circumstances of strong radiation dose and/or high incident dose rate. Therefore, further radiation-hardening for MFIS structure devices is necessarily required if it is used for a memory device in harsh radiation environment.5. The single event effect in ferroelectric-gate field-effect transistor(FeFET)under heavy ion irradiation was investigated by using Sentaurus TCAD. The simulation results show that when the ion strikes the channel of FeFET, the drain current transient shows a symmetric shape center on about 2 ns due to the diffusion current is the main component of the drain current transient. The negative current in source electrode after 1 ns indicates that the source injects electrons into the channel due to the residual holes left in the substrate raise the substrate potential and lower the source junction potential barrier, these injected electrons can be collected by the drain electrode. When the ion strikes the drain junction, the drain current transients reach the maximum value, and the peak value of drain current transient in FeFET is almost equal to that in the conventional MOSFET. The reason is that the funnel-aided drift current is the main component of drain current transients. From the simulation results we can see that the single event effect sensitive area of FeFET is the reverse biased drain area, however, when the FeFET storage unit stores an OFF state information, the gate(channel) of FeFET may also be its single event effect sensitive area.6. Two novel layout techniques for mitigating single event effect were proposed.The first one is the drain-wall layout technique, and the second one is the 3-transistor common drain(3TCD) layout technique. The additional electrodes of the proposed drain-wall layout have been designed for additional collection of ion-induced charges by drain electrode thus reducing the drain charge collection. Numerical simulations have shown that when compared to conventional layout and guard drain layout,drain-wall layout can mitigate single event effect charge collection and single event transient pulse width(WSET) effectively, Moreover, part of ion incidents can be shielded. Drain-wall layout has the best ability in reducing not only charge collection in single device but also WSET in seven-stage inverter chain. For the proposed 3TCD layout technique, the 3D simulation results show that this new 3TCD method has an obvious effect on the FeCMOS by mitigating single event transient pulse widths.When compared to a conventional structure, we find that the proposed 3TCD layout technique can provide the best benefit of single event transient mitigation, improving the single event effect resistance of FeCMOS obviously.