The Research Of Radiation-tolerant High-speed Array Optical Transmitter Module And The ASICs

In high-energy physics experiments at colliders the collision rates have increased considerably with the turn on of the Large Hadron Collider (LHC), and highly complex algorithms have been applied to process the data in real time. This trend is foreseen to continue with the high luminosity LHC Phase Ⅰ, Phase Ⅱ upgrade. As a result, data rates proposed for collider detector readout upgrades have increased rapidly. The VCSEL Array based technology is the mainstream trend in the compact high-speed optical transmitter development in recent years. It naturally meets the requirement of the high-density, high-bandwidth, radiation-tolerant data links, which are critical for the LHC upgrades as well as other collider detector developments.In this paper, we proposed an integration of a VCSEL array and a driving ASIC in a custom optical transmitter module (ATx) and report its development. ATx comprises a16mm×21mm×1mm substrate with high-density wiring and half-via structures around the substrate for the electrical interface. Both bare dies of the VCSEL array and the array driver are epoxied to the substrate. The optical interface is composed of two array optical components:a Mechanical Optical Interface (MOI) and a Prizm LightTurn Connector. The light output of the VCSEL array is collimated by micro-lens in the MOI. The Prizm Connector, which can be clipped onto the MOI, deflects the light by90degree and couples the light into the fiber ribbon. The MOI needs to be aligned with the VCSEL array within a tolerance of10μm, and tackled down to the substrate using epoxy. One of the most challenging and crucial aspects of developing array optics module is the alignment process. Current commercially available solutions are too expensive for research and development, and the final coupling efficiency cannot be detected until the MOI is epoxied after the alignment process. A custom simple and reliable active-alignment method is developed to solve this problem. Currently we can complete the MOI alignment of each module in the lab using manual stage within15minutes, and ensure that the insertion loss of each channel is less than-3dB, the variation of all channels is less than1dB, and the light crosstalk is less than-50dBm in adjacent channels.ATx module is a versatile array optical transmitter module that can accommodate different array drivers. A commercial12-channel,10Gbps/ch array driver was used for function verification of the ATx. And now it is replaced by a custom VCSEL array driving ASIC (LOC1d2014). The LOCld2014is a4-channel,8-Gbps-per-channel, radiation-tolerant VCSEL array driver with open-drain output structure, fabricated in a commercial0.25μm Silicon-on-Sapphire (SOS) CMOS technology. For the radiation tolerance purpose, we use0.25um SOS process for LOCld2014design. The design goal is that each channel of LOCld2014receives a low-swing CML signal (2mA minimum), outputs a modulation-current signal of about7.5mA with a bias current of about6.25mA. Each channel consists of five pre-driving stages and one main driving stage. Five pre-driving stages use the active shunt peaking technique to extend the bandwidth, and the peaking strength is programmable. In the last driving stage, we remove the independent bias circuit in the external branch (VCSEL branch), and deliberately design the internal branch to make it balance with the external branch where the VCSEL is connected in series as the load, to minimize the switching component in the power source, the ground-bounce noise and the crosstalk between the adjacent channels. The LOCld2014has been tested.8Gbps optical eye diagram of each channel has been captured and passed the eye mask with adjacent channels working simultaneously. The BER less than1E-12is achieved at each channel working at8Gbps with adjacent channels working simultaneously.Besides the ATx module and the LOCld2014ASIC. Another digital encoder ASIC (LOCic) for high-speed serial data transmission (ATLAS LAr liquid argon calorimeter Phase I upgrade) is also presented. The LOCic ASIC receives the outputs of two ADCs, and processes the data at320M with a bit width of16, including data scrambler, CRC code generator, BCID code generator, and the date frame build. The overall latency of the LOCic isThe primary innovations of the thesis are as follows.1. The ATx module is the first practical array optical transmitter module in the realm of the high-energy physics. The ATx module achieve the total120Gbps data link within a space under2cm x2cm x4.3mm.2. The ATx module is also the first array optical module using the micro-lens coupling technology in the realm of the high-engergy physics. A simple, high accuracy and reliable active alignment method which is most critical for the array optics assembly performance is developed.3. The LOCld2014is the first VCSEL array driving ASIC working at8Gbps/ch in the realm of high-energy physics. In the last driving stage, the LOCld2014adopts the balanced differential output structure without the extra bias circuit, which minimizes the switching component in the power source, the ground-bounce noise and the crosstalk between the adjacent channels...