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Research On Mechanisms And Implementation Techniques Of On-Chip Embeddable Robust TRNG

Posted on:2009-03-03Degree:DoctorType:Dissertation
Country:ChinaCandidate:T ZhouFull Text:PDF
GTID:1118360278961927Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the rapid development of computer and communication technology, the issues on information security become more and more important, and cryptography is the sole technique to solve these issues. Based on modern cryptography, the security of information systems fundamentally depends upon the randomness of random numbers which are used to produce important secret data. In order to improve the security after the advent of SoC design, the research and development on crypto-processor on a chip has become into a necessity. Thus, aiming at the high-level cryptographic application, and meeting the requirement for embeddability, the present dissertation puts forward the subject of"Research on Mechanisms and Implementation Techniques of On-Chip Embeddable Robust TRNG"which is to develop the on-chip embeddable TRNG with better performance as well as independent intellectual property. Furthermore, this will help to build a solid foundation for the ulterior development of system-level information security products.The second chapter deals with two kinds of TRNGs based on the resistor thermal noise, the randomness of which comes from a natural physical process. For the method of directly amplifying resistor thermal noise, a relatively easier structure is proposed, and the critical circuits are optimized. As to the method based on oscillator, the resistor thermal noise is effectively added to improve phase jitter, and a bandgap reference is introduced that improves the system robustness. Simulation results show that, the designed two kinds of TRNGs are able to pass all the applicable randomness tests without any post-processing circuits, and both have an output bit rate as high as 10Mbps.The third chapter elaborates upon the theory of generating random numbers by chaotic shift map, and the influence upon the randomness statistics of the generated sequences brought by the change of map parameters. This chapter also makes a theoretical analysis on the method of avoiding parasitic stable points when analog circuits realize the shift map. Then a detailed circuit design is given, which realizes the shift map by switched-capacitor technique. And a method of adding the controllable capacitor array is proposed, which effectively avoids the parasitic stable points. The detailed circuit design realizing the shift map by switched-current technique is also given, which is more compatible with the digital CMOS process. This design adopts a high-speed linear track-and-hold circuit. Through appropriate circuit design, the known method of avoiding parasitic stable points is realized more symmetrically with very low power consumption.In the fourth chapter, in order to guarantee the robustness and the randomness at the same time, an extended version of the Bernoulli shift map is proposed. The extended map is realized by switched-current technique, and the implemented TRNG possesses an extra superiority of robustness and low power consumption, with 10Mbps as output bit rate. Through improving the current mirrors of the whole circuit, a TRNG with approximately ideal information entropy is implemented, as well as an output bit rate of 20Mbps. Then an extended map aiming at PW1D map is realized by adopting the technique of capacitor charge redistribution which, beyond the improvement of robustness, retains the property of low power consumption. In addition, a differential structure suitable for the realization of switched-current technique is proposed in order to eliminate the negative influence to randomness by the two nonideal factors of the realized map, whose validity is verified by the elementary circuit design.The final chapter expounds on correction methods of random sequences, and proposes a method of using the hash algorithm to correct the original outputs of TRNG. Then a detailed ASIC design of the SHA-1 algorithm module is given, whose logic on the longest critical path is optimized. Also a module directly invoking the SHA-1 module in crypto-processor is given, which corrects the original outputs of TRNG, and at the same time improves the output bit rate of random sequences.
Keywords/Search Tags:Truly random number generator, Robust, Chaos, Noise, Switched-current
PDF Full Text Request
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