Investigation Of Novel Partial Insulation Bonding SOI Structure And Application

From basic theory and technology practice of SOI for new optoelectronic andMicro-Electro-Mechanical Systems application requirement,a novel Partial InsulationBonding SOI (PIB/SOI) structure is proposed due to its good thermal and electricalconductivity of silicon without losing normal SOI's good isolation property.Severalinterrelated basic microcosmic forces mechanism of wafer pro-bond and application keytechnical problems are diccussed and researched.The first problem interrelated with PIB/SOI stucture is how microcosmic forces orintermolecular forces affect pro-bond of silicon wafer.Three type microcosmic forceshave been compared and analysed.Three main conclusions have been drawn:microcosmic forces of hydrophilic silicon wafer bonding attribute to hydroen bond,hydrophobic silicon wafer bonding attribute to Van der Waals forces,capillaryimmersion forces and interrelated atmospheric pressure forces are neglectable.Analysiscalculation indicate that,for 4 inch wafer,Van der Waals interplay energy is about124mJ/m²,corresponding forces 9.73×10⁶ N,and,hydroen bond interplay energy about193.3mJ/m² to hydrophilic bonding,capillary immersion forces about 2.55×10^-3～8.49×10^-1 N,and corresponding atmospheric pressure forces 7.93×10² N.Also,the micro volume gas sealed by tiny grain caused by actually clean roomentironment and micro-step caused by silicon process is a signify disbenefit factor forwafer pro-bond.The successful or not of wafer bonding is a zero sum game caused byhow much area percent of wafer surface is absolute flatness which increase pro-bondforces against elastic deflection which decrease pro-bond forces.This process has twofactor,most important one is how close the two wafer bonding surface gap can be,another is how many percent area of two wafer bonding surface can close with a givenminimum distance.Calculation indicate that this given minimum distance is about 5nmfor 4 inch wafer.When the gap of two wafer bonding surface is less than 5nm,microcosmic attraction is dominance,which cause to positive feedback and thephenomenon which is called"bonding wave",then,the wafer bond at a given percentcontact surface area of two wafer finally.On supposition 100mJ/m² pro-bond energy,gap distance of two wafer surface is 0.22nm.Viewpoint of capillary immersion forces can only be calculated as beeline or curve line or point rather than a plane or curvedsurface is presented.Secondly,resistance optimization of IC with bury layer,especially for big currentpower IC is another basic problem interrelated with PIB/SOI stucture.Simplification2-D and 3-D model are proposed to solve it.The 2-D model indicate that integrateddevice structure with bury layer has self-limitation resistance property and specificresistance increase almost linearly with device area.The 3-D model has no property ofself-limitation resistance,while the result is the same as that for specific resistance of2-D structure.Experiment and simulation indicate that,experiment value is smaller thanmodel predicted value almost 28%,while inflection point prediction of resistance curveis accurate.Thirdly,problem interrelated with PIB/SOI stucture is total dose radiationcharacter of PIB/SOI device,especially for VDMOS with different load powerdissipation case.Based on measurement of VDMOS I-V curve after X-ray radiationunder diverse power dissipation,it is found that,property of new interface traps inducedby X-ray radiation with self annealing VDMOS sample,i.e.with big power dissipation,does not conform to existing theory commendably.For explaining this characters,combined with traditional theory,a assumption of interface trap current conductiveproperty is proposed and a model is exported,which gives a more exact result.Newoxide charges,maximum interface trap negative charges before and after stronginvention is 6.78×10¹¹cm^-2,-6.78×10¹¹cm^-2,-1.54×10¹¹cm^-2 according to model.For experiment and realization,a method of LPCVD and epitaxy transitionpolysilicon layer is introduced,which make integrality percentage of this new waferstructure more than 85% and contact specific resistance of Si-Si bonding interface lessthan 5×10^-4Ω.cm².BCD process with integrated vertical conductive VDMOS has beenmade,and breakdown voltage of this BCD structure VDMOS is 160V,on-resistance0.3Ω,specific on-resistance 26mΩ·cm²,breakdown voltage of NPN/PMOS/NMOS50V/35V/30V respectively,NPN current gain and cut-off frequency 120 and 700MHzrespectively.This PIB/SOI stucture may be an useful technique in application of automotiveelectronics,radiation hardened and strong Electromagnetic Pulse (EMP),high voltageIC,high reliability IC,MEMS and OEIC.