Research On Security Enhancement Strategy For Wireless Sensor Networks Chip

Wireless sensor networks(WSNs) are a kind of wireless Ad Hoc network composed of a large number of Sensor nodes.They attract much attention due to its wide range of potential applications,such as logistics,military surveillance,medical treatment,traffic management,efficient agriculture,environmental monitoring,and so on.Wireless sensor networks pose a number of challenging problems.For instance,WSN systems have very limited cost and power supply by its nature,which lead to limited ability of computing and communication.On the other hand,one of the most critical issues WSNs is security issue, which is becoming the key barrier for practical applications.Sensor nodes chips are core devices of WSN,and have direct impact on the performance,security and lifetime of of WSNs.In this dissertation,the focus is mainly on several problems for design and optimization of the low-cost high-security WSNs node SoC(System-on-Chip) as follows:Firstly,IEEE 802.15.4 potocol is discussed which is utilized widely in wireless sensor networks as the standard in low-rate wireless personal area network(LR-WPAN). The implementation of WSN node chips are proposed based on sigle-cycle 8051 microprocessor tructure.Focuses are put on the storage strategy,direct memory access (DMA) controllers design,and medium access control(MAC) coprocessor implementation.Then,the potential security problems and improved chances are analysised.Secondly,hardware implementations of the authentication and encryption circuits are presented.An energy consumption variable is derived for battery-powered sensor nodes to evaluate the low-power design strategy,when considering the thoughput of the system. Optimization of area and power consumption of advanced encryption standard(AES) and secure hash algorithms(SHA) are discussed in detail.These circuits were implemented with 0.25μm 1.8V CMOS(complementary metal-oxide-semiconductor) standard cell library,and comparisons were performed in area,throughput and energy for different authentication implementations.Based on the discussion of AES hardware implementation and power analysis theory,a novel power analysis immune scheme is proposed.This method divides the data-path of AES into two parts:inhomogeneous S-Boxes instead of fixed S-Boxes are selected randomly to disturb power and logic delay in the non-linear module;at the same time,the general masking strategy is applied in the linear part.Following that,a MAC encryption coprocessor suitable for IEEE802.15.4 standard is implemented.The above researches can be used in WSN,and contributes to ubiquitous computing security issue.A new secure information protect coprocessor(SIPC) is proposed to deal with secret key protection,updating,and management.The SIPC utilizes the SHA-1 engine,and optimized instruction set is proposed based on the security model.It is easy to tamper soft code in WSN nodes,whereas modifying the hardware are expensive in time and cost.So it is possible to perform secure bootload and recovery.The WSNs nodes chip can boot with authentication using hash trees.When authentication failing,SIPC takes over the whole node instead of microprocessor.Then,SIPC,DMA and MAC cooperate to recover the chip fuction.A location engine for WSN is implemented based on received signal strength indicator(RSSI) technology with a maximum likelihood estimation algorithm.Then,this dissertation studies the key distribution scheme using location information.This stragety can resist many kind attacks and enhance the WSN security.Finally,power optimization schemes are discussed.Two different sleep modes are proposed for sensor node chips:shutting down clock and power supply.State transition between different power modes are described by linear model;and two types of oscillators are used to reduce wakeup time.The key issues including power supply module design, data retention and MAC timer synchronization strategy are detailed.The chip utilize a coprocessor and wireless receiver to detect wakeup preamble instead of using embedded microprocessor control unit,which lead to high efficiency and low energy consumption.