Research On The Key Technology For The Read/Write Channel Servo Signal Detect Technology In Hard Disk

The read/write channel, as an important component of hard disc, whose key functions are to fulfill data writing into storage and reliable data recovery through circuit. Efficient read and write channel design not only can enhance the storage density, also improve data transmission rate. In the read/write channel the servo signal plays an important role to refer to correct addressing of magnetic header and accurate location of magnetic header. The servo timing recovery circuit, servo signal sampling circuit and discrete servo signal sampling points computing compose a servo signal detect key technology as well. With code modulation technology, bandwidth and storage density continuous improvement and breakthrough, the servo timing recovery circuit design of the read/write channel has become more complex, while stable and reliable data recovery will become more important. Therefore, the servo signal detect circuit design decides the stability of the read and write channel and the accuracy of data recovery.Around hard disk read/write channel technology, aiming at the servo signal characteristics, simulation and test for three aspects of the servo signal sampling circuit, servo signal timing recovery circuits and servo signal sampling discrete points calculating, the major efforts are as follows,Research in the servo burst signal sampling of hard disk read/write channel, servo sampling clock, servo timing recovery and servo burst signal calculating. provides relevant theory and model so to offer theory basic for in-depth research and improvement.Offering SNR estimation method based on the quantization noise power spectrum. Existing ADC converter sampling circuit is not strong in practicality for SNR estimation. Improves current SNR estimation methods so to offer SNR estimation method based on the quantization noise power spectrum and in-depth research on the read/write data and servo signal. For the servo burst signal, Improves existing over-sampling technology to offer sampling-switching-high-sampling technology. For the higher precision of servo burst sampling, the separate sampling circuit is used through switching so to raise 1.5 bit and be tested through simulation.Offering servo interpolated timing recovery model based onτfactor. Based on current PLL timing recovery implementation, Adopts interpolated timing recovery method with a better solution for noise sensitive of clock recovery circuit and noise caused by the circuit. Through test to compare with linear interpolation scheme to prove interpolation implementation based onτfactor to obtain better harmonic frequency.Offering recursive FFT algorithm based on Pruning. Improves current FFT algorithm of servo burst signal calculating to offer recursive FFT algorithm based on Pruning so to offload N points computing to N/2 and decrease servo burst signal computing workload significantly.Offering direct digital frequency synthesis (DDFS) based on the frequency -phase to achieve the following sampling clock. Based on servo interpolated timing clock recovery mode, the sampling clock can adopt fixed sampling clock. But the fixed clock increases workload of module Ts accumulator, adopting the following clock mode can reduce workload of module Ts accumulator. For the following clock design, the latest technology based on the clock synthesis phase of direct digital frequency synthesis (DDFS) is used, in order to meet servo interpolated timing recovery requirements, the DDFS based on frequency phase is offered through frequency-phase converter right module Ts accumulator of frequency offset for conversion, and provides test result and experimental comparison.Provides system hardware and relevant algorithm design for the servo burst signal sampling, servo sampling clock synthesis, Servo timing recovery and servo burst signal calculating.