Research On Fault-Tolerante Microprocessor Architecture For Space Application

CPUs used in our current on-board computers for space are notsupporting fault tolerant for SEU(Single Event Upset).The only solution toensure the reliability of space application is to use system level fault tolerantarchitecture. This solution heavily affected the real-time performance of thesystem, that limited the capacity of the satellites, especially for deep-spaceapplication usage.According to the requirements for future space computers, a fault-tolerantarchitecture of micro-processor is deeply studied in this paper. A completeon-chip fault tolerant micro-processor architecture has been designed andimplemented. Two chips of SEU tolerant, high-performance micro-processorsfor space application, with IP(Intelltual Property), are manufacturedsuccessfully.The main achievements of this paper are:1. A complete on-chip fault tolerant structure for micro-processor ispresented, based on through analysis of the fail mechanisminduced by SEU. This Structure is verified in LSFT32 chip seriesdesign.2. A continuous error correction pipe-line scheme is presented. It cancontinuously perform fault detection and automatic correction fordata error in register file in real-time.3. A scheme of automatic recovery memory controller is presented. Itcan support automatic data recovery for SEU error correction,without any CPU function evolvement.4. A on-chip fault injection technology is presented. Using thistechnogiy, a on-chip fault injector for LSFT32 was designed. Itsupport software controlled fault injection model, which is essentialto the verification of the fault tolerant architectures.5. Using 0.5μm CMOS process, with rad-hardened lib andcustomized memory supported, a rad-hardened, 32-bit RISCmicro-processor LSFT3201 (BM3801), with 25MHz main clock, isdesigned and implemented as the first one in China, thatsustaining to 300krad(Si). Using 0.18μm common CMOS process,a SEU fault tolorante floating microprocessor LSFT3202 (BM3802),with 175Mhz main clock, is Designed and implementedThe success in the development of SEU tolorant micro-processors willplay active role to resist the foreign blockade.