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Research On Automatic Code Generation And Optimization In Parallelizing Compiler

Posted on:2007-11-11Degree:DoctorType:Dissertation
Country:ChinaCandidate:P ZhangFull Text:PDF
GTID:1118360212475804Subject:Computer software and theory
Abstract/Summary:PDF Full Text Request
The need for high performance parallel software has been increasing rapidly with the wide use of high performance computer systems. How to take full advantage of the hardware and software resources and speed up computing, and how to translate to parallel computer systems the serial programs which has been proved to be effective for years, have been the focus of research interest in high performance computing field. Parallelizing is one of the approaches of solving these problems. A parallelizer is a compiler which identifies potential parallel factors in a serial program and translates it to an equivalence and effective parallel program. Though techniques of parallelizing have been improved with the development of high performance computer system, there still exist problems for parallelizers to be used in practice, and thus further in-depth study is still urgent need.The aim of a parallelizer is to generate high performance parallel programs according with target machine architecture. So how to generate high performance parallel programs is an important aspect in the research of parallelizing. This thesis focuses on the research of parallel code generation and optimization techniques for two kinds of parallel architecture in a parallelizing compiler. The research is based on development KAP (Kit of Automatic Parallelizer) -an automatic parallelizing compiler of C and Fortran.The content of this thesis falls into two parts. The first part focuses on code generation and communication optimization of message-passing parallel program for distributed memory architecture. For distributed memory architecture, data and computation are distributed among processors: communication is inevitable and is the main overhead of parallel executing. Main contributions of this part are as follows:1. A redundant parallel execution model (RPEM) is proposed as an execution model for target parallel programs generated by the parallelizer. Based on this model, control flow graph is extended and the information of parallel executing and data distribution is added.2. A general framework based on data flow analysis is presented to realize communication optimization. In this framework, dependence information is included and optimization strategies such as communication latency hidden, message vectorization, message coalescing and redundant communication elimination are realized. The experiments show that communication optimizations reduce and hide communication overhead effectively, and improve the performance of generated parallel programs.3. During data flow analysis, boolean calculation is used to define data flow equations which avoids the complexity of aggregate operation. Data flow equations are calculated using unidirectional data flow analysis which makes the optimization algorithm have liner complexity.4. Based on RPEM, communication during parallel computing is classified. Communication set is defined with symbol linear inequalities system. According to...
Keywords/Search Tags:Automatic Parallelizer, Code Generation, Communication Optimization, Parallel Region Reconstruction, Synchronization Optimization, Data Flow Analysis, Cross-processor Dependence Graph, Control Flow Graph
PDF Full Text Request
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