Fabrication Of LTPS TFT With High Qualities And Design For Integration Of Peripheral Drive Circuits

Developing the active drive technology of new flat panel display (FPDs) device OLED and integrating the driver IC with the pixel on glass both intensely depend on the development of the technology of LTPS TFT. The key to fabricate high qualities LTPS TFT is to prepare p-Si thin film at low temperature.Firstly, the thesis focus on the best technique processes for the preparation of p-Si thin film at low temperature both by UV-assisted crystallization and metal-induced crystallization. Some modern analyzing methods such as XRD, SEM and Raman spectrum were utilized to characterize the structure and the properties of the prepared p-Si thin film. A new method to prepare p-Si thin film at low temperature was proposed, namely MI bi-ELA.Metal-induced crystallization is a perspective technology for preparation of the large-grain p-Si at low temperature. The mechanism of Ni-induced crystallization was discussed in detail. A model for crystal growth during metal-induced crystallization of amorphous silicon has been proposed to predict crystal growth.In this work electric propertied of p-Si TFT were outlined and the methods to analyze and extract the main parameters of TFT device were summarized. AIM-Spice model for p-Si TFT was introduced and an improvement of its procedure was presented. AIM-Spice model for p-Si TFT provides a well-accepted way of simulating device and reference to design and fabricate p-Si TFT or with which built circuit.Both the combination of OLED with LTPS TFT technology and the integration of display part with peripheral drive IC are the trend of flat panel display (FPDs). Pixel drive circuits for OLED were designed and analyzed by simulating. Basic logical circuits and peripheral drive IC based on LTPS TFT were discussed for the first time.The purposes of the work are to study the method, process and mechanism of preparation for p-Si in order to fabricate LTPS TFT with high qualities and to investigate the performance of device by modeling and simulating LTPS TFT and built circuit for further research of integration.