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Fault Diagnosis Of Large-scale Analog Circuits Based On Wavelet And Neural Networks

Posted on:2006-03-20Degree:DoctorType:Dissertation
Country:ChinaCandidate:Y H TanFull Text:PDF
GTID:1118360155962679Subject:Electrical theory and new technology
Abstract/Summary:PDF Full Text Request
The applications of large-scale integrated circuits allow the scale and the structure of a network to be more and more functioned and modularized with the development of modern electronic industry. So it is an urgent subject in practical project to study how to identify the fault sub-circuits and the fault elements correctly by using modern diagnosis technique for large-scale circuits with tolerance, and it is also a key step for practical application of fault diagnosis for analog networks theory and technology.The paper presents some neural network and wavelet methods for fault identification of large-scale analog circuits by using genetic approach based on the statistic analysis of networks responses. The main contributions in the paper are as follows:Orientation of fault sub-circuits in large-scale networks is studied in the paper. First, genetic approach to calculate feasible domains of responses of tolerant circuits is given; then a new screen method to diagnose faults of large-scale circuits is put forward. And fault sub-circuits are oriented by measuring node voltages of a large-scale circuit stimulated by voltage sources and comparing node voltages with their normal value when the large circuit is logically torn into several sub-circuits. It is characterized by its simple operation, high diagnosis velocity, and feasible to identify fault sub-circuits of very large-scale circuits.The numerous samples are obtained of responses of tolerant circuits by transferring them to random noises added to the samples of responses without tolerance with one genetic calculation based on the statistic analysis. It leads to low calculation complication of fault diagnosis for sub-circuits by applying neural network methods. And a large-scale circuit is torn to sub-networks according to the torn principle proposed and fault elements in each block are identified with assigning a neural network to each individual. Optimizations to algorithm parameters, structure and initial weights of networks are performed in order to obtain best correct classification of faults. Numerous experiments show that optimizations toneural networks with genetic algorithm engender better system performance and higher correct classification to the faults of no-overlapping.Based on genetic algorithm, two means to select stimulus and test nodes of a circuit are advanced: one is to translate stimulus selection into distance optimization functions of responses of a circuit under various fault conditions, and the other is to convert it into optimization functions of means and covariance of responses. So it can obtain the optimum value of stimulus and test nodes simultaneously by adopting genetic method with the memory decreased drastically owing to no demand for matrix operation. It is applicable for nonlinear circuits as well as linear ones.The paper presents new methods for solving wavelet packet decomposition feasible domains of responses of a circuit with tolerance. Two measures are adopted to obtain high correct classification of faults. On the one hand, the feature vectors are extracted to maximize the distance between the various faults based on wavelet and wavelet packet decomposition, and the scale and shift parameters in the wavelet decomposition are involved in weights of neural networks in order to find their optimum value. On the other hand, the best structure and parameters of classifier obtained using genetic algorithm for classifying the faults are available by comparing function wavelet networks and weight wavelet networks by using tight wavelet neural networks as basic fault detectors leading to high convergence velocity. By fusing various uncertain factors into probabilistic and fuzzy operations, wavelet probabilistic neural networks and wavelet fuzzy neural networks method to diagnose faults are proposed whose parameters and structure obtained form genetic optimizations resulting in best detection of faults. Finally, simulations comparing the various methods proposed indicated that wavelet probabilistic neural network and wavelet fuzzy neural network classifiers can correctly identify at least 92% of the test data associated with our sample circuits.A fault diagnosis method based on current test of terminals stimulated is proposed. For the faults difficult to detect merely from the sampled node voltages of the circuit, the current signals of the terminals which contain sufficient information with various faults are fused with the sampled node...
Keywords/Search Tags:Analog circuits, Fault diagnosis, Neural networks, Wayelet fuzzy
PDF Full Text Request
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