Study On Fault Diagnosis In Analog Circuits Based On Neural Networks

Fault diagnosis in analog circuits is one of the challenging topics. Due to the nature of signals in a real world, analog circuits are universal and they couldn't be substituted. Progress in very deep submicron semiconductor technology prompts the advent of System-on-Chip (SOC) and analog/digital mixed-signal integrated circuits, and many theoretical problems appear in the analog test area. Using general or traditional theories and methods of fault diagnosis, they are difficult to be solved. Neural networks (NNs), which are a typical representation of Computational Intelligence, provide a powerful way to diagnose faults of analog circuits. At present it is interested to researchers. This dissertation based on NNs profoundly studies fault feature extraction and fault diagnosis methodology. Its academic foundation is modern test technology, signal processing, information fusion and testability analysis, etc. Author's main work concentrates on three aspects as follows:1. On fault feature extraction for analog circuits.(1) In frequency domain, fault feature is extracted directly through efficient points in the curve of frequency response. Simulation results illustrate that NNs are feasible to fault diagnosis in analog circuits. In addition, a special feed-forward neural network - radial basis function (RBF) neural network is researched and applied to fault diagnosis of analog circuits.(2) In time domain, feature parameters of the step response are compressed using principal component analysis (PCA). It has many good properties, such as simplifying the structure of NNs, improving the training speed and fault coverage.(3) In time-frequency domain, fault feature of dynamic supply current test (Iddt) is extracted through wavelet transform (WT). An approach of fault diagnosis in analog circuits Iddt is presented based on WT and NNs. For the universality of the supply point in analog circuits, this method could be achieved conveniently.2. On fault diagnosis for low testability circuits. One method of neural networks...