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Research Of Product Modeling And Virtual Feature Generation Based On Virtual Prototype

Posted on:2001-01-28Degree:DoctorType:Dissertation
Country:ChinaCandidate:Q YangFull Text:PDF
GTID:1118360092998880Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
As rapid development and widely application of Virtual Reality (VR) technology, more and more designers have accepted the design method based on Virtual Prototype (VP) . VP is a simulatable digital model that will resemble the physical product as closely as possible in terms of visual, auditory, haptic, functional and behavioral features. This paper addresses the following techniques: product modeling in conceptual design, virtual feature generation, and some important implementation techniques of them.Traditional Computer-Aided Conceptual Design ( CACD ) systems adopt professional symbol and simple graphs, which cannot express the views of designers directly because of the lacking of 3D interface instruments. Designers cannot validate the whole product's function or performance intuitively and find the possibly illogical design in time. It is difficult for product's users to participate in evaluating design schemes, which makes the design cannot match the needs of application completely. Conceptual design based on VP can solve this kind of problems easily. This paper gives the definition and explanation of related concept, and it analyzes the needs and characteristics, and it also introduces the description method and design process of conceptual design based on VP.Modeling in conceptual design is a key technology in CACD system. Considering the characteristics of conceptual design and the feature classification of VP, this paper presents a novel virtual prototype-based product model, V-desModel. V-desModel introduces virtual feature concept in product's view models, and employs expandable 3D entity-constraint graph to describe the constraints between design objects. V-desModel can effectively support the process of cooperative design and concurrent design, and it can effectively solve the insufficient information problems in constructing virtual prototype during the conceptual design of product.Traditional model description languages can not satisfy the needs of product model description in Virtual Prototype-Based Conceptual Design (VPBCD). Depending on the improved Bond Graph and V-desModel model, this paper presents a novel model description language, VPML. VPML is a discipline and process-independent model description language of electro-mechanic products in VPBCD. VPML has strong abilities on geometry and behavior modeling, and it provides coherent model description for cooperative design, concurrent design, and confederate simulation of multi-discipline systems.According to the needs of conceptual design, this paper presents the concept of Virtual Feature Generation (VFG) , which is absolutely necessary in constructing the virtual'prototype of product during the stage of conceptual design. This paper expatiates the method and process of VFG, and it introduces the role of VFG in design and simulation based on VP, and presents a knowledge-based VFG method and agent-based feature service mechanism. Considering the need of application, this paper also discusses the implementation techniques of VFG.As examples of VFG, this paper introduces in detail the system- and chip-level VFG of electronic devices. System-level VFG means generating the placement of cells in 3D environment rapidly under the constraints provided by Concurrent Design Planner (CDP) , according to the design description and cells' information, then extracting the physical feature which will be used in other tools such as analysis, simulation, and planning. This paper presents a novel model and algorithm of rapid system level placement for CDP. The basis is hierarchical placement based on the model of directed graph partition. Introducing timing-driven placement to clustering, it is an excellent method that mixes the characteristics of timing-driven placement, clustering and directed graph partition. Integrated with CDP, this algorithm can solve the system-level VFG problems of electronic devices.In chip-level VFG, the power and area of ASIC are estimated first according to the high-level specification provided by designer. The...
Keywords/Search Tags:virtual prototype, concurrent design, conceptual design, modeling method, placement, bond graph, simulation
PDF Full Text Request
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