Nano-lithography Technique And Its Application On Three-terminal Junctions Device And Nanowire-grid Polarizer

Electron beam lithography (EBL) is one of the most developed nanolithography techniques. It has advantages of high-resolution, flexible operation, maskless and fabrication of all kinds of nanostructures, which makes it become the important tool for micro/nano science and technology research. However, the inherent proximity effect and field stitching error have serious effect on exposed patterns with high-resolution and high-density. Nanoimprint lithography (NIL) has advantages of large area, high-resolution, high-throughput and low-cost. It is considered to be the most potential nanolithography technique for replication of large area nanostructures with high-resolution. However, there are still some technical issues in industrial application. Stamp technology is one of the bottlenecks among these issues. In this thesis, some key issues in EBL and NIL were systematically investigated, and Si-based three-terminal junction nanoelectronics device and flexible bilayer metal wire-grid polarizer were realized using EBL and NIL, respectively. Finally, the two devices were characterized.The study starts with one of the most developed nanolithography techniques-EBL. In order to relieve the effect of the proximity effect, electron beam exposure dose and pattern design were optimized through experiment. The overlayer process was used to improve the field stitching accuracy of EBL. By means of the optimization of overlayer size and its exposure dose, very good field stitching accuracy was obtained.By means of the optimized EBL process and dry etching process, the SiO2 stamp with 200 nm period,75 nm linewidth, and 190 nm height was obtained on 1 inch Si/SiO2 wafer. The scanning electron microscope images showed good shape homogeneity and size uniformity in large area. Based on the self-cleaning effect of imprint process, two efficient approaches, thermal and UV imprinting cleaning processes, have been investigated to remove typical particles and residual resist from stamps. The studied results demonstrated that thermal and UV imprinting cleanings approaches are non-destructive processes, which can effectively remove all the particles and residual resist from the stamps. The two cleaning processes have advantages of simplicity, low-cost, high-efficiency, and non-destruction.The process flow and parameters of thermal NIL were systematically studied, and the optimized nanoimprint parameters were obtained for resist and plastic substrate. The residual layer thickness and residual layer etching process were optimized. By means of thin residual layer technique and optimized residual layer etching process, nanostructures with small critical dimension loss has been successfully replicated, and the critical dimension loss has been controlled within 5 nm. A 6 mm x 6 mm high-resolution nanonet patterns with 70 nm period and 25 nm linewidth have been successfully fabricated on silicon substrate using flexible stamp NIL and dry etching processes. In addition, nanodot with about 22 nm×22 nm size was created on the top of the cross-point of two nanowires.The realization and characterization of silicon three-terminal junction nanoelectronics device made in a silicon-on-insulator wafer has been studied. The junction devices have been fabricated using EBL and dry etching process. Room temperature electrical measurement showed that the fabricated devices exhibit pronounced nonlinear electrical properties inherent to ballistic electron transport in a three-terminal ballistic junction device (TBJ). It has also been shown that to achieve a strong nonlinear ballistic transport behavior it is desirable to employ a sufficiency thin Si layer in fabrication of the devices. The work demonstrates that the branched nanostructures made from Si could be used to realize room temperature functional TBJ devices, and has moved the TBJ device concept one step further toward practical use.The rigorous coupled-wave analysis (RCWA) was used to design a flexible bilayer metal wire-grid polarizer. The TM transmittance and extinction ratio of the polarizers were investigated for different matels and geometrical parameters including periods, duty cycles, metal layer thickness, and spacing between two metal layers. The samples with 200 nm period were fabricated on flexible plastic substrate based on simulation results, using NIL followed by 100 nm thickness aluminum layer deposition. TM transmission over 0.18 and extinction ratio higher than 186 can be achieved in visible spectrum. The fabrication process only involved direct imprinting on flexible plastic substrates and aluminum deposition, without any resist spin-coating, lift-off, and etching processes, which is much simpler, less costly, and applicable to large volume production.