Study On The Physics Effects And Compact Models Of Dual Gate Amorphous Silicon Thin-film Transistor

High performance amorphous silicon thin-film transistor, which serves as the essential technology in related industries, has widely used in representative of flat panel display,i.e.,active matrix organic light-emitting diode(AMOLED). With the rapid development of large-size, 3D flexible display and virtual reality technology, higher requirements on electrical performance of TFT are also attached. Recently, amorphous silicon thin-film transistor with dual gate over a single one has been given widely attention and suggested for the subject of future work. Advantages reported on these devices laid on the enhancement of mobility, steeper sub-threshold slope, better uniformity and compatible with the exiting manufacturing process. Hence, a systematic research on unified modeling of a-Si:H TFT shows important practical significance.Several original research work on compact models of a-Si:H TFT suitable for SPICE have been done in the dissertation. the main contents are given as following.Firstly, high density complicated distribution located within the a-Si:H have significant influence on the electrical characteristic of a-Si:H TFT. an analytical expression for calculating density of trapped charge based on two exponential DOS distribution is present. Then, by deploying the Gaussian law, the implicit surface potential equation including gate voltage for a-Si:H TFT is derived. A charge sheet based model is developed in that followed by use of mathematical transformation and charge analysis. Contract to the case of poly-Silicon, the trapped charge dominate the surface possin equation even as the device was biased under the above-threshold region. The model accurately accounts for the sub-threshold, linear and saturation operation region in a single expression. Terms of the diffusion and drift current have successfully separated so that each part of these could be evaluated qualitatively in detail.Secondly, based on the mechanism of trap-to-band tunneling current inclusive of the PF effect, the approach for calculation effective electric field is given considering the exponential distribution of trap states. A novel generation-recombination model for the leakage current has been developed in that followed. The proposed model, which takes into account the effect of both Dirac and Coulombic trap, allows for the simulation of reverse current for a-Si:H TFT. Combining the forward and reversed current calculated separately, a completed drain current model is derived. The proposed model is verified on a-Si:H TFTs with different channel lengths using various and experimental data, a good agreement is achieved.Thirdly, taking deep Gaussian and tail exponential distribution of the density of states into account, a novel scheme for potentials of amorphous silicon thin film transistor using symmetric dual gate has been present. The proposed scheme, valid from below to above threshold regimes, provides a completed solution of the potentials at the surface and mid of the layer without solving any transcendental equation. Validity of the work has been verified by extensive comparison to the rigorous numerical simulations. The calculation efficiency has finally been demonstrated. A significant promotion is obtained.Fourthly, based on the surface and centric potentials obtained from previous part, a compact drain current model accounting for the interaction factor has been proposed. We show what parameters are truly required for accurately describing the I-V characteristic of sDG a-Si:H TFT and just how qualitatively these parameters affect TFTs current. Terms of potentials and current calculation are successively verified by comparison with numerical and the published experimental data. Specifically, we have simulated the electrical characteristic of n~+-i-n~+ structure within staggered sDG a-Si:H TFT. The analytical expressions on distribution of density of current and channel potential in overlap region have been derived. We present a model that incorporates intrinsic channel current and non-linear parasitic current resulting from the effect of space charge limited current conduction. The result presents a theoretic basis for further processing as well as structure optimization for those devices.Fifthly, a couple set of potential equations for asymmetrical dual gate a-Si: TFT is obtained by deploying the Gauss’ s law. A unified channel potentials model with two independent gates is derived that followed. The model starts with solving the 1-D Poisson equations resulting from the general boundary conditions. Then a novel approach used for fast evaluation of both surface and back potentials has been developed. The proposed model is successively verified through comparison with numerical simulations. The result demonstrates that the approximation of surface potential given by this work is very close to the numerical solution. It’s therefore proved to be very suitable for the initial value setting for the simulation tools.In conclusion, several compact models including the single-gate and dual gate of a-Si:H TFT have been present in this dissertation. Those model are based on the completed distribution of density of state within a-Si:H and prove to be suitable for circuit simulation package. A novel trader-off has been made between model complex and computation efficiency. Validity of the models have also verified through 2-D simulation, numerical calculation as well as the experiential data.