Research On Key Technology Of Mobile Video Surveillance On MPSoC

Accompanied by the rapid development of mobile communication, high resolution mobile video surveillance (MVS) is becoming more and more important in video surveillance system, since it’s easy to install, flexible and cost effective. However, the development of daily increasing surveillance video resolution becomes a challenge for mobile communication technology, especially up channel effective transmission bandwidth, which is the basement of MVS. Deblocking and motion detection can solve the above challenge to some extent, furthermore, compressed domain deblocking and motion detection can keep away from the challenge of architecture design of MPSoC caused by high video resolution of video surveillance like 4K:4690x2304 or even more.This dissertation is focused on the research of related design/implementation in MPSoC of deblocking filter, large carrying data and high complexity module, and motion detection, especially the application specific instruction processor (ASIP) design of the compressed domain deblocking filter. The main work and the original thinking included are described in detail as following:● An original adaptive composite algorithm in compressed domain for deblocking filter (LCJDD) is proposed, which is based on edge map detection in compressed data with hysteretic based edge linkage and defective rate identification. Furthermore, the LCJDD algorithm is improved for the applications in embedded mobile surveillance (EMS). The principle behind is firstly with hysteretic based edge linkage enhanced edge detection to identify edge region and flat areas, and secondly with the help of DCT coefficients analysis of the half-block-size shifted image block and the original neighboring image blocks in no-edge areas, the defective rate is classified. Finally, based on the classified defective rate, an adaptive composite processing procedure is applied for the deblocking purpose. Simulation results illustrated that LCJDD can robustly deal with blocking artifacts no matter under low bit rate encoding or high bit rate encoding scenarios (bpp=0.28～1.2), human flaws dramatically decreased, objective image quality of the reconstructed video sequence improved 1%～3%. Furthermore, compared with previous classic methods, the improved LCJDD for embedded purpose only needs 1/2～1/3 and 1/4 execution time correspondingly in real HD mobile surveillance processing scenarios. Experiment result with Cadence default type Lx6 under 600MHz, which is similar VLIW architecture as TI DSP (8 concurrent instruction slots), illustrated that improved LCJDD can handle 130 frames/per second (resolution:1024×768; quantitative parameters (QP):10) in real-time with only 3 concurrent instruction slots.● An original motion detection algorithm (ECLC) is proposed, which is based on motion edge map and hysteretic based potential motion area linkage, and also the corresponding compressed domain implementation are carried out. The principle behind is firstly with edge map frame difference to identify core foreground area with the high degree of motion since the gradient info can strongly reveal the foreground pixel’s spatial correlation, and secondly with exponential monotonic decreasing background model to identify the potential motion area. Finally, hysteretic based potential motion area linkage with core foreground area is applied to extract the universal foreground area. Simulation results illustrated that the problems, such as too much noise, susceptible to rapid optical variable interference and target detection accuracy is low, are significant improved in the analyzed result of ECLC. Extract integrity indicators of the analyzed result of ECLC for the official standard test videos are basically superior or equivalent to the better results of GMM and ViBe. In the case of similar extract integrity of these three methods (ECLC, GMM and ViBe), false alarm indicator decrease more than 50% compared with the other two.● An ASIP module design of low resource consumption and high throughput for improved LCJDD based on Cadence Lx6 (VLIW customizable ASIP framework) is fulfilled. The principle behind is firstly with the finite mesh of polyhedron and concurrent schedule to extract the maxim concurrency of LCJDD application, and secondly with time-able SDF and the extracted maxim concurrency to predict the valuable range of architecture resources for the corresponding implementation, such as the number of concurrent instruction slots and the number of the instruction operand registers. MPSoC embedded ASIP module for improved LCJDD realized very high throughput, very low memory access and resource consumption:With 28MHz operating frequency and 3 concurrent application specific Instruction (ASI) slots, while the maximum ASI slots number is 5, the deblocking filter in MPSoC can achieve real-time compressed domain deblocking with video parameter at 4690x2304@30frame. Furthermore, compared with the very high throughput deblocking filter for H.264/AVC (pixel domain processing) in latest literature under same realization technology(65nm) and also the same data dependency pattern, the maxim concurrency improved 20%, throughput increased 2 times, data access decreased 87%, and space of temporary data on the chip decreased 60%. Under 65nm and 28nm technology, the maxim operating frequency of the compressed domain deblocking ASIP can achieve 597 MHz and 940 MHz separately.