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Research On Substation Process Bus Communication Based On IEC 61850

Posted on:2006-01-05Degree:DoctorType:Dissertation
Country:ChinaCandidate:Z L YinFull Text:PDF
GTID:1102360152983136Subject:Power system and its automation
Abstract/Summary:PDF Full Text Request
Substation is the one of the most important part of the "power system. With the development of the novel electronic transducer and intelligent switchgear, the parallel wiring to link the process level and the bay level of substation automation system will be replaced by serial optical cable, and it is a technology renovation of the substation automation. It is called as process bus communication in IEC 61850.This dissertation deals with the transmission of the sampled values and trip signals of the procss bus, which are the two very demanding kinds of data transfer. The significant achievements are as follows:(1) For the transformer protection and measurement, two different modeling approaches of the sampled value model are proposed. On the basis of in-depth analysis of sampled value model, the internal meaning of the object-oriented modeling defined in this standard is investigated and the sampled value model is constructed and mapped in a specific way. As a result, the intrinsic unified relationship between the abstract model and concrete mapping is revealed, and a favorable theoretic basis is supplied to realize the digital transmission of sampled values.(2) A new FPGA based method to interface the electronic transducer is proposed. Merging unit, the key to connect the electronic transducers with digital output and new protective devices, is analyzed in depth. Sampled values from several electronic transducers can be received using FPGA, and the validity of which can also be checked by means of cyclic redundancy code checker. Moreover, these sampled values can be ordered correctly via FIFO before they are transmitted. It is demonstrated that this method can meet the communication requirement of the interface, i.e. multi-task to be dealt with in parallel, high reliability and real-time requirement.(3) A new FPGA based method to realize the synchronization of the merging unit is proposed firstly. In order to minimize the sync error, the method of two-speed synchronization sampling is improved. The new method can be used to synchronously sample the multi-channel current and voltage information after identifying reliably and accurately the rising edge of the sync clock input pulse. When the sync pulse is disturbed or lost temporally, the real-time tracing and judging can be done. As a result, the synchronization can be achieved quickly when the sync...
Keywords/Search Tags:IEC 61850, Process bus, FPGA, Merging Unit, Synchronization
PDF Full Text Request
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