| This dissertation discusses the complicated equiments mainly applied in Military Electronics System (MES), and can be called Complicated Electronics System (CES). The integrated testing technique of CES is an important approach to improve reliability, maintainability, supportability, testability, safety and diagnostic capability of complicated military equipments greatly. It can be improved the operational readiness and increased maintenance support capacity of complex equiment system.Integrated testing of CES includes Built-in test (BIT) and Ground-Test System (GTS). The BIT technology is defined as an on-board hardware-software diagnostic in equipment and system. The GTS is defined as on-line or off-line testing outside of equiments. The integrated testing means to achieve measurement data, identify faults for CES, and it is a common key technique of system design, compoment design, condition monitoring, fault diagnosis, maintaining decision and so on.This dissertation discusses the BIT and GTS technology of complicated equiments,especially for BIT of CES. It studies on design and application of BIT and GTS in CES, combines BIT and GTS system modeling, design, intelligent detection and diagnosis with the development of new military equipments closely today.Because the BIT and GTS design and application in CES have some problems, so BIT and GTS technologies become a key issue that should be well solved. This dissertation mainly study on two topics:Firstly, it is pay attention to study and anylize on the basic theories and essence problems in system model, design, monitoring and diagnosis of intelligent BIT and GTS technology for CES.Secondly, how to apply the advance theory and new-style technology of intelligent BIT and GTS to the complicated equipment design and manufacture systematically.The main results in the dissertation are as follows:1) According to complicated system modeling and system engineering theory, established BIT and GTS testability model, key measurement index, and test knowledge representation methods. It is combined components and system model in statistic mathematics with the design of equipment testability, and applied in engineering practice for complicated electronic equipments.2) Discuss the advanced methods of intelligent detection and diagnosis, such as information fuse, wavelet transform, netural networks, and markov model etc, and analyzed the abrupt change phenomena, fault pattern, then submits a uniform process architecture for CES.3) Analyzed the reasons of uncertainty problems in measurement information of CES, exerted bayes decision, system identification, and parameter estimation to solve the practice problems in engineering environment. It submits a full algorithm to compute the prior distribution using maximum entropy principle and discussed the process methods for small samples in the CES.4) This paper studied on advanced field bus and real-time network technology for requestion of BIT design in the CES, designed a lot of BIT test nodes with AT91RM9200, Cortex M3 and PowerPC processors, and produced the test devices. In order to improve real-time performance of equipment, anylized the real-time schedule algorithms and submitted a Critical-based Schedule Algorithms (CSA).5) In order to implement"five nature"and"seriation, generalization andmodularizatio"of CES, submitted a kind of testability design for BIT and ATE. The paper submits a General Ground-Test Interface (GGTI) stardard, designs a series of testing board, and submits an integrated schema for BIT in CES based on system-chip. The devices that made in our project have successfully applied in the real devices and systems.At present, the research work on BIT and GTS of complicated electronic equiments are at the stage of initial development, and there are many problems still open. The relative technologies and mechanism presented in this dissertation may provide some new techniques and ideas for the development of the integrated testing of complicated electronic equiments. |
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