Font Size: a A A
Keyword [VLSI]
Result: 161 - 180 | Page: 9 of 10
161. Hardware Design And Implementation Of The Key Modules Of JPEG2000 Encoder
162. Research And Implementation Of The Adaptive Arithmetic Codec Of JPEG2000
163. VLSI Design Research And FPGA Implementation Of Adaboost Algorithm
164. Study Of Implementing Wavelet Transform And Reconstruction With Hardware
165. A Study Of Deep-Submicron Interconnect Effect And Physical Design Of H.264/AVC-AVS Video Decoder Chip
166. The Hardware Configuration Of Discrete Cosine Transform Based On Distributed Algorithms
167. Low Power VLSI Implementation Of JPEG Image Compress Algorithm
168. Research On Inter-Frame-Prediction Technology In AVS Video Encoder And It's Hardware Implementation
169. The Research Of VLSI Floorplan Algorithm And Thermal Model
170. VLSI Implementation Of Channel Coding In UWB Wireless Communication
171. Design Of Random Write/Read I~2C Serial Bus Interface Circuits Based On FPGA/HDL
172. LFSR Reseeding Test Scheme Based On Dividing Some Vectors
173. Test Data Compression Based On Blocks' Compatibility Of Responses And Group-Frequency Encoding
174. A Fast Algorithm For H.264/AVC Intra Prediction Encoder And VLSI Implementation Of Decoder
175. The Research On Delay-Fault Testing Technology For FPGA
176. Research On The Timing Verification For Full-custom Designed VLSI Chip
177. Optimization Algorithm And VLSI Design Of RS Decoder Based On DVD Application
178. Study On Inter Prediction Decoder And Its High Performance VLSI Implementation For H.264
179. Analysis Of Performance And Study Of Layout Algorithm On The Architecture Of NoC
180. VLSI Auto Testing And Design For Test
  <<First  <Prev  Next>  Last>>  Jump to