Keyword [BIST] Result: 121 - 140 | Page: 7 of 8 121.  Fully digital-compatible built-in self-test solutions to linearity testing of embedded mixed-signal functions 122.  On test generation and fault diagnosis in scan built-in self-test 123.  Analog Neural Classifiers for Built-In Self-Test of Analog/RF Circuits 124.  Digital built-in self-test of analog iterative decoders 125.  Built-in self -test and self -repair for capacitive MEMS devices 126.  Implementation of UART with BIST technique in FPGA 127.  Built-in self-test solutions for high and low frequency analog/mixed-signal circuits 128.  Deterministic built-in self test for digital circuits 129.  New memory BIST and repair methods 130.  Defect oriented test of inertial microsystems 131.  BIST-diagnosis of interconnect fault locations in FPGA's 132.  Fault diagnosis in scan-BIST with system-on-chip applications 133.  Design and implementation of a novel BIST scheme for Xilinx XC4000E FPGAs 134.  Design methodology for mixed-signal AC BIST and ADC self-calibration 135.  Extending the reach of self-test approaches in VLSI 136.  A re-configurable pipeline ADC architecture with built-in self-test techniques 137.  Built-in self-test technique for high-speed phase-locked loops 138.  Towards efficient analog/mixed-signal testing 139.  Low power BIST 140.  New pseudo random testing techniques for scan-based built-in self-test   <<First  <Prev  Next>  Last>>  Jump to

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