Communication Protocol Multi-core Processor Development

In recent years,the application of communication technology become more extensive as the continuous development of communication technology.The traditional single-core processor structure has been unable to content the growing computing requirement in more complicated communication system today.Widely applied communication protocol and standard are outstanding advantages of the communication system.The communication protocol is the basic guarantee for the system to operate correctly and efficiently.At the same time,programmable logic devices are becoming more and more popular in the embedded field,and their high flexibility is very suitable for individual designers.This thesis based on the related technology of multi-core processor and SDL formal language,and design a dedicated multi-core processor system based on SDL communication mechanism and oriented to communication protocol on FPGA,the system satisfied the increasingly complex communication protocol design requirements in communication system and the computational demand which are growing up in geometric progression.The research content of this paper is one of the key technologies to solve the problem that the performance of communication systems cannot be guaranteed when facing complex communication protocols.Firstly,this paper describes the research background of multi-core processors and the current research status at homeland and abroad,and research the key technologies used in multicore processor systems,mainly including three aspects: the comparison and selection of processor cores,the basic principles of SDL communication mechanisms and efficient application of IP core multiplexing technology.Considering the expandability and the feasibility of actual development in multi-core systems,the Micro Blaze processor soft core provided by Xilinx is used as the computing core,and the IP multiplexing technology is the main technology for system design and development.Secondly,according to the communication method based on the signal queue in the SDL communication mechanism,the hardware communication mechanism of the multi-core processor system is designed.Such mechanism mainly includes the communication between the master and slave devices and the communication between the processor cores,and based on this communication mechanism proposed a hierarchical two-level bus architecture,the processor core constructs an independent local processor subsystem through a local bus,and each local processor subsystem is connected together through a global bus to implement the second-level bus architecture.Such system ensures each processor core could correctly sharing system resources,it also achieves efficient communication between processors;the structure of a single master core and multiple slave cores is used to divide and address each module in the system.Finally,this experiment is based on the Arty-A7 development board,and using on-chip logic resources,on-chip BRAM storage resources,and off-chip DDR3 SDRAM memory chips as the hardware foundation.Mailbox core,Mutex core,and various official IP cores as the design foundation to design and implement each module.At the same time,each designed independent module is integrated through the secondary bus architecture to form a complete multi-core processor system,which mainly includes a local processor subsystem,global memory,inter-core communication module and mutual exclusive synchronization modules,etc.Test each module in the system through the method of software and hardware collaborative design to decide the correctness of this system and verify the performance of this system.