Conception d'un processeur embarque de faible complexite dedie a une plate-forme SoC pour concevoir des processeurs reseaux

Network processing system components are programmable devices performing wire-speed processing of Protocol Data Units in data communication devices. They emerged as a direct result of the growing demand for enhanced, flexible next generation communication services. This research is part of an effort to implement a SoC platform that could support high throughput and low latency real time video streaming. This flexible platform is based on a custom embedded processor for which we also developed an application specific assembler. Simple protocol conversion algorithms were coded for this processor. This SoC platform allows system designer to replace fixed-functionality ASICs and RISC CPUs in the critical path with intelligent, programmable devices that maintain wire speed.; This Master's thesis presents a brief study of several Network processors that are already in the market. It proposes a SoC platform architecture capable of doing protocols conversion among other telecommunication applications such as classification. We have implemented a custom embedded processor that will be integrated in this SoC platform for packets manipulation. This thesis compares several versions, of our embedded processor with the ARM7, a popular core processor available in the market. It demonstrates some benefits of an embedded processor in a SoC platform dedicated to video streaming packets. The custom processor offers a higher performance, and could be easily adapted to our needs; however, we could not approach the density of the ARM7 with the available cell library and physical design flow.