Design And Implementation Of FPGA Based Status Monitor Device For Motherboard

As the manufacture process of IC shrinking and the scalability of IC increasing,the design technology of processor keeps advancing rapidly.With the manufacturing process going into deep sub-micrometer and nanometer and improved multi-core processor architecture,the digital logic and IPs integrated inside the processor also increase.These demand more effort in the design of processor and also bring more challenges to processor's testing.Design for Test as a design methodology for solving these issues has been evolving all the time and draw more and more attentions by the industry.Its purpose is without impacting the chips normal function by adding extra test circuits to improve the testability during the design process and lower the testing cost.This thesis mainly focuses on the development of status monitor device designed for the latest CPU and checks its function.This CPU mentioned is a 32 cores high performance processor.This brings lots of challenges to the defects tracing and fix during the development phase.To meet the testing goal and improve its testability,one status monitor device is developed using Xilinx Zynq-7000 FPGA.And it can support these function:monitor processor's status and collect the registers value via the CPU JTAG interface.The board is very useful and practical The efficiency and accuracy can be improved when solving processor's defect.At last,these function mentioned above will be tested to make sure all the design implementation such as processor debug mode entry,scan dump function and SOC's debug function can be met.Make sure it is a useful tool for the development of processor.And those functions which will be supported in the future are also discussed.