Research And Implementation Of LVDS/MINI-LVDS TV Motherboard Test System Based On FPGA Device

With the rapid development of video transmission system,LVDS(Low Voltage Differential Signal),as a high-speed and serial video interface technology,is widely applied in the field of video transmission.Many chipmakers have launched sending and receiving chips based on LVDS,these chips are diverse and have different formats,which brings great inconvenience to the operators when test the TV motherboard.HDMI(High Definite Multimedia Interface)based on the TMDS(Transition Minimized Differential Signaling)technology occupies a dominant position because of its good compatibility and transmitting uncompressed all-digital audio/video signals well.At present,special decoding chips are used to convert LVDS differential signals into RGB data and output them through VGA analog video interface in the market,however,the decoding chip can only convert the LVDS video signal with low speed,and the image after converting will be distorted when the data rate exceeds the threshold value.Under the background of the above,this paper designs a TV motherboard test system based on FPGA and DDR3 SDRAM.The system adopts the XC7A100T-2FGG484 I chip of ARTIX-7 series as the core processor,two DDR3 SDRAM chip as the data cache,LVDS/MINI-LVDS video driver board with different output formats and different resolutions as the input of the system,and HDMI 2.0 interface as the output of the system.After the building of hardware circuit is finished,the LVDS/MINI-LVDS video signals with different formats and different resolutions will be extracted and serialized into the standard RGB digital signals recognized by the general processor through Verilog HDL programming,and the RGB data and timing control signals were cache by DDR3 SDRAM under the control of the frame synchronization signal,in the HDMI interface TMDS channel encoding module,the RGB data was encoded into the minimum transform differential signal TMDS,and finally output through the HDMI 2.0 interface.In this process,and the design of an on-chip clock system mainly based on phase-locked loop PLL,the collection of multi-channel high-speed serial differential signals,the parallelization of serial data using FPGA primitive,the frame synchronization of digital images,the design of DDR3 SDRAM memory controller,the realization of ping-pang read-write operation,the design of mirror image inversion operation and 8B/10 B encoding are mainly realized.Verilog HDL logic design is verified by ModelSim,the final result will be displayed in time through the display terminal by using tools like ChipScope and Oscilloscope to test the system.According to result,the software and hardware of the system can convert LVDS or MINI-LVDS video signals with different formats and resolutions into TMDS video signals,and output them through HDMI 2.0 interface,Which improves the efficiency of testing TV mainboard by operators,reduces the testing cost of enterprises,and achieves the expected design goals well.