Fault Research And Fault Repairing Circuit Design For Ferroelectric Memory

Ferroelectric memory is a special kind of memory whose memory cell is made of ferroelectric materials.It has the advantages of high read-write speed of random access memory(RAM)and non-volatile storage of read-only memory(ROM),and fills the vacancies between RAM and ROM.With the development of integrated circuit manufacturing process,the size of memory cell in memory chips is getting smaller and smaller,which makes the memory array and other circuit parts of memory chips more vulnerable to the influence of non-ideal factors in the manufacturing process,resulting in circuit defects,which may lead to the storage function failures of memory chips.Based on this,as the starting point,the possible physical defects in the memory array of ferroelectric memory and the corresponding failure modes are explored by means of circuit simulation in the second chapter of this thesis,and the corresponding failure mechanism is analyzed in detailed combined with the working mechanism of ferroelectric memory.In the production of memory chips,due to the existence of defected memory cells,there are chips with storage function failure in the manufactured memory chips.In order to reduce the cost of manufacturing,some redundant memory cells are often reserved in the design of memory circuits to replace the defected memory cells,so as to repair the invalidated memory chips and improve the yield.With the continuous improvement of memory capacity,the scale of memory array is also expanding,and many novel memory array circuit architectures have emerged.However,when integrated with some memory applications that use array dividing designs,the traditional redundancy repair scheme based on fuse programming has some shortcomings,such as the failure to share redundant storage resources among sub-array blocks,the insufficient utilization of redundant storage resources and the low success rate of repair.In response to these shortcomings,the third chapter of this thesis introduced a dynamic configuration based redundancy repair scheme.In that scheme,the redundancy repair circuit for addressing redundant storage resources was designed in a way that can be repeatedly configured.Meanwhile,a ternary content addressable memory(TCAM)and a small-scale read-only memory(ROM)were introduced into the redundancy repair,and together with the redundancy repair circuit,the redundant replacement of the defected memory cells is realized.In addition,the third chapter also introduced variety of basic repair methods which are suitable with the redundancy repair scheme based on dynamic configuration to repair the storage failure.Combined with these basic repair methods and the characteristics of the redundancy repair scheme based on dynamic configuration,several derivative repair methods which are beneficial to improving the utilization of redundancy resources were further introduced.In the fourth chapter of this thesis,an 1 Mbit ferroelectric memory array circuit based on 2T2 C ferroelectric memory cells was designed by using a hybrid array dividing method,and the redundancy repair scheme based on dynamic configuration introduced in this paper was implemented in the ferroelectric memory application scenario by Verilog HDL and circuit schematic diagrams.