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Ferroelectric bismuth-layered SBT and metal/ferroelectric/insulator/silicon transistor for memory applications

Posted on:2003-02-06Degree:Ph.DType:Dissertation
University:Yale UniversityCandidate:Han, Jin-PingFull Text:PDF
GTID:1468390011489556Subject:Engineering
Abstract/Summary:
This research work focuses on various important issues associated with the materials science and technology of ferroelectric thin films that are relevant to FEDRAM (FErroelectric Dynamic Random Access Memory) application, with an emphasis on physical and electrical characterization of the Metal/Ferroelectric/Insulater/Si (MFIS) structures. The sample preparation procedure of ferroelectric SrBi 2Ta2O9 (SBT) and its basic characterization have been developed. A major process integration issue, the forming gas annealing induced degradation of ferroelectric films, has been identified, and a model based on the top electrode dependence of catalytic reactions to dissociate hydrogen has been proposed to explain the experimental observation. It has been found that the memory effects of the MFIS structure depend strongly on its microstructural and micromechanical properties, which can be significantly influenced by the type and quality of buffer employed as well as its post-deposition annealing temperature. These results have provided process optimization guidelines for realizing MFIS devices. As a feasibility study of a proposed capacitor-less FEDRAM concept, functioning FEDRAM capacitors and transistors with a record-thin (∼3 nm EOT) SiN buffer layer have been demonstrated. These devices exhibit comfortable memory windows, fast switching speeds, high endurance, and long retention times, in addition to being able to withstand realistic thermal budgets and forming-gas anneal conditions compatible with CMOS processes, which are attractive for advanced FEDRAM applications.
Keywords/Search Tags:Ferroelectric, FEDRAM, Memory
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